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Simplified hardware component inter-connection system for generating a visual representation of an illuminated area in a flight simulator

  • US 4,511,337 A
  • Filed: 06/25/1982
  • Issued: 04/16/1985
  • Est. Priority Date: 06/25/1982
  • Status: Expired due to Fees
First Claim
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1. Apparatus for generating, on the display surface of a raster scan device, an illuminated area having a predetermined geometrical configuration simulating the base of a cone of light that would be visible on a more distant plane surface, where the orientation of said cone of light can be varied, and said geometrical configuration is adjustable in size and shape to simulate changes in position of said base on said plane surface as the orientation of said cone of light is varied, comprising:

  • computer I/O means to compute and to provide signals representative of the display axis to ground axis direction cosine matrix elements, b31, b32, and b33, and various values of a light shape coefficient, G1 through G8 ;

    horizontal sweep generator means to generate a signal Tan Ψ and

    a vertical sweep generator means to generate a signal Tan θ

    to represent instantaneous azimuth and elevation values, respectively, of the base of a cone of light as the base appears on a display device;

    a first multiplier circuit means to receive the output from said horizontal sweep generator means and to receive said signal from said computer I/O means that is representative of said element b32 to provide a signal output representative of the function b32 Tan Ψ

    ;

    a second multiplier circuit means to receive the output from said vertical sweep generator means and to receive said signal from said computer I/O means that is representative of said element b33 to provide a signal output representative of the function b33 Tan θ

    ;

    first ADD circuit means to sum the functions b32 Tan Ψ

    and b33 Tan θ

    with said signal b31 from said computer I/O means, to provide an output signal representative of a value C3 which is the related vertical component of the display surface;

    a third multiplier circuit means to receive a light shape coefficient value signal G3 output from said I/O means and to receive said Tan Ψ

    signal to generate a function G3 Tan Ψ

    ;

    a fourth multiplier circuit means to receive a light shape coefficient value signal G2 output from said computer I/O means and to receive said Tan θ

    signal to generate a function G2 Tan θ

    ;

    second ADD circuit means to sum the functions G3 Tan Ψ and

    G2 Tan θ

    with a light shape coefficient value signal G1 output from said computer I/O means to provide an output signal representative of a value F2 ;

    a fifth multiplier circuit means to receive a light shape coefficient value signal G5 output from said computer I/O means and to receive said Tan Ψ

    signal to generate a function G5 Tan Ψ

    ;

    a sixth multiplier circuit means to receive a light shape coefficient value signal G6 output from said computer I/O means and to receive said Tan θ

    signal to generate a function G6 Tan θ

    ;

    third ADD circuit means to sum the functions G5 Tan Ψ and

    G6 Tan θ

    with a light shape coefficient value signal G4 output from said computer I/O means to provide an output signal representative of a value F3 ;

    first circuit means to provide signalvalues equal, respectively, to Tan2 Ψ and

    Tan2 θ

    ;

    a constant voltage source to provide a voltage output at a predetermined value;

    inverter amplifier ADD circuit means to receive said Tan2 Ψ and

    Tan2 θ

    signal values and to sum said values with said voltage output of the constant voltage source to provide an output signal representative of a value F1 ;

    a seventh multiplier circuit means to receive said value F1 and to receive a light shape coefficient value signal G8 from said computer I/O means to provide an output signal representative of a value G8 F1 ;

    second circuit means to receive said value C3 and to provide a signal value output equal to C32 ;

    eighth multiplier circuit means to receive said C32 signal and a light shape coefficient value signal G7 from said computer I/O means to provide an output signal representative of a value G7 C32;

    third circuit means to receive said value F2 and to provide a signal value output equal to F22 ;

    ninth multiplier circuit means to receive also said value C3 and said value F3 to provide an output signal representative of a value F3 C3 ;

    fourth ADD circuit means to sum the four functions G7 C32, F3 C3, G8 F1 and an inverted F22 to provide an output signal representative of a value T;

    a signal comparator circuit means to receive said value T to determine whether each point on said geometrical configuration would be visible; and

    a video processor responsive to said signal comparator circuit means for modulation of said raster scan device;

    whereby the video modulation creates said illuminated area directly on said display surface corresponding to each point on said geometrical configuration that would be visible.

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