Programmable logic array, including an arrangement for invalidating faulty and term outputs
First Claim
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1. A programmable logic array comprising:
- an AND array having a plurality of first input lines and a plurality of first output lines as AND terms, said AND array being programmed by electrically connecting selected ones of said first input lines and selected ones of said first output lines;
an OR array having a plurality of second input lines connected to corresponding ones of said first output lines and a plurality of second output lines, said OR array being programmed by electrically connecting selected ones of said second input lines and selected ones of said second output lines; and
invalidating means for selectively connecting said first output lines forming said AND terms or said second input lines to a constant potential source.
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Abstract
A programmable logic array comprises an AND array for producing AND term outputs on a plurality of AND term lines, an OR array which receives the AND term output of the AND array as inputs thereto, and an AND term disregarding array connected to the AND term lines to selectively invalidate the AND term outputs. The AND term disregarding array functions to disregard one of the AND terms on which a program defect is present.
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Citations
5 Claims
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1. A programmable logic array comprising:
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an AND array having a plurality of first input lines and a plurality of first output lines as AND terms, said AND array being programmed by electrically connecting selected ones of said first input lines and selected ones of said first output lines; an OR array having a plurality of second input lines connected to corresponding ones of said first output lines and a plurality of second output lines, said OR array being programmed by electrically connecting selected ones of said second input lines and selected ones of said second output lines; and invalidating means for selectively connecting said first output lines forming said AND terms or said second input lines to a constant potential source. - View Dependent Claims (2, 3)
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4. A programmable logic array comprising:
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an AND array for producing AND term outputs on a plurality of AND term lines; an OR array connected to said AND term lines to receive said AND term outputs of said AND array as inputs thereto; and invalidating means for selectively connecting said AND term lines to a constant potential source. - View Dependent Claims (5)
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Specification