Compressively stresses titanium metallurgy for contacting passivated semiconductor devices
First Claim
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1. Contact metallurgy for an integrated semiconductor substrate having circuit elements therein, comprising:
- a dielectric coating on said substrate having an aperture therethrough for electrical connection to a said element in said substrate;
a contact pad comprisinga first layer of compressively stressed titanium covering said aperture and having peripheral portions extending on and bonded to said coating externally of said aperture, with said titanium having oxygen dispersed therein, anda second layer of solder bondable contact metallurgy concentrically formed on said first layer.
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Abstract
Contact metallurgy is disclosed for passivated semiconductor devices. The metallurgy comprises a compressively stressed, oxygen-containing titanium underlayer covered by a solder-bondable layer extending through via holes in dielectric material on the semiconductor device. The solder bondable layer is either nickel or ruthenium, where lower current densities are encountered or a composite of layers of copper, titanium, copper and gold for higher current densities.
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11 Claims
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1. Contact metallurgy for an integrated semiconductor substrate having circuit elements therein, comprising:
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a dielectric coating on said substrate having an aperture therethrough for electrical connection to a said element in said substrate; a contact pad comprising a first layer of compressively stressed titanium covering said aperture and having peripheral portions extending on and bonded to said coating externally of said aperture, with said titanium having oxygen dispersed therein, and a second layer of solder bondable contact metallurgy concentrically formed on said first layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification