Digital computer system including apparatus for resolving names representing data items and capable of executing instructions belonging to general instruction sets

• US 4,514,800 A
• Filed: 05/22/1981
• Issued: 04/30/1985
• Est. Priority Date: 05/22/1981
• Status: Expired due to Term

• Current Assignee: Data General Corp. (Dell Technologies Inc.)
• Original Assignee: Data General Corp. (Dell Technologies Inc.)
• Inventors: Mundie, Craig J., Farber, David A., Bernstein, David H., Wallach, Steven J., Belgard, Richard A., Richmond, Michael S., Schleimer, Stephen I., Ahlstrom, John K., Pilat, John F., Bratt, Richard G., Clancy, Gerald F., Wallach, Walter A. Jr., Gruner, Ronald H.
• Primary Examiner(s): Shaw, Gareth D.
• Assistant Examiner(s): Dorsey, Daniel K.
• Application Number:
  US06/266,525
• Time in Patent Office: 1,439 Days
• Field of Search: 364/200, 364/900
• US Class Current: 712/203
• CPC Class Codes: G06F 9/35 Indirect addressing
• CPC Class Codes: G06F 9/4484 Executing subprograms

Abstract

A digital computer system including a memory and a processor. The memory operates in response to memory commands received from the processor. Items of data stored in the memory include instructions to which the processor responds. Each instruction contains an operation code which belongs to one of several sets of operation codes. The meaning of a given operation code is determined by the operation code set to which the instruction belongs. Some of the instructions also contain names representing items of data used in the operation specified by the operation code. The processor includes an operation code decoding system which decodes the operation code as required for the instruction set to which it belongs, a name resolution system for deriving the address of the data item represented by a name from the name using an architectural base address contained in the name resolution system, and a control system which controls the operation of the processor. The processor performs a call operation and a return operation. Only the call operation and the return operation may change the current architectural base address. The memory further contains name table entries associated with the names. Each name table entry contains information used by the name resolution system when it resolves a name.

Claims

1. A digital computer system comprising:

(1) memory means for performing memory operations including storing and providing data items in response to memory commands including addresses of said data items, said data items including

(A) instructions, each said instruction containing

(i) an operation code of a plurality of said operation codes, each said operation code specifying an operation of a plurality of operations performed by said digital computer system, and each said operation code belonging to one of a plurality of different operation code sets, the operation codes in a given operation code set being definable solely with reference to said given operation code set, and selected ones of said instructions further containing

(ii) a name representing an item of data to be used in the operation specified by the operation code in said selected instruction, and

(B) sequences of said instructions; and

(2) processor means connected to said memory means for performing the operations performed by said system and providing memory commands to said memory means in response to said instructions, said processor means including

(A) operation code decoding means for decoding the operation code in an instruction received in said processor as required by the operation code set to which the operation code in said received instruction belongs,

(B) name resolution means for receiving the name in said received instruction and for deriving the address for the item of data represented by said received name using a current architectural base address, and

(C) control means responsive to said operation code decoding means and to said name resolution means for controlling the operation of said processor means and for providing said memory command including the address provided by said name resolution means to said memory means,

and wherein

the operation performed by said system include

(A) a call operation which suspends the execution of the current sequence of instructions by said processor means and begins the execution of another sequence of instructions, and

(B) a return operation which terminates the execution of said another sequence of instructions and resumes said suspended execution,

and a currently used architectural base address can only be changed as a result of said call operations and said return operations.

2. In the digital computer system of claim 1, and further wherein:

all the instructions contained in each sequence thereof contain operation codes belonging to only one operation code set of said plurality of operation code sets.

3. In the digital computer system of claim 2, and further wherein:

each sequence of instructions has associated with it an operation code set identifier of data items identifying the operation code set to which the operation codes in the instructions of said sequence belong; and

said operation code decoding means responds to the operation code in said received instruction and to the operation code set identifier associated with the sequence of instructions containing said received instruction for decoding said operation code as required by the operation code set to which said operation code belongs.

4. In the digital computer system of claim 3, and further wherein:

said operation code decoding means responds to a representation of the operation code set identifier associated with the sequence currently being executed by said processor means;

said representation can only be changed as a result of said call and return operations; and

said operation code decoding means decodes said operation codes using said representation.

5. In the digital computer system of claim 1, and further wherein:

said name resolution means includes a plurality of architectural base addresses; and

said architectural base addresses can only be changed as a result of said call operations and said return operations.

6. In the digital computer system of claim 5, and further wherein:

said data items further include a plurality of process items, each process item containing data items associated with the executions of selected procedures, each process item including

(a) at least one frame of said items, each frame corresponding to the execution of one of said selected procedures, and

(b) a static data area of data items associated with at least the execution of one of said selected procedures; and

said architectural base addresses include

(a) a frame address specifying the frame corresponding to the current execution,

(b) a static data address specifying said static data area associated with said current execution, and

(c) a procedure base address specifying the instruction sequence whose instructions are being executed in said current execution.

7. In the digital data processing system of claim 1, and further wherein:

all of said instructions have common formats.

8. In the digital data processing system of claim 7, and further wherein:

said processor means further includes parsing means for receiving instructions and for providing operation codes to said operation code decoding means and names to said name resolution means.

9. In the digital data processing system of claim 7, and further wherein:

all operation codes have a first fixed size;

all names in one instruction sequence have a second size;

each said sequence has associated with it a syllable size;

of data items specifying said second size of said names in said sequence; and

said processor means further includes parsing means responsive to said syllable size for receiving said instructions and for providing said operation codes to said operation code decoding means and said names to said name resolution means.

10. In the digital computer system of claim 1, and further wherein:

each name permanently corresponds to a name table entry of said data items, each name table entry including information from which the address of the item of data represented by the name corresponding to said name table entry is to be derived; and

said name resolution means further employs the information in the name table entry associated with said received name together with said architectural base address to derive the address for the item of data represented by said received name.

11. In the digital computer system of claim 10, and further wherein:

each sequence of instructions is

permanently associated with a name table of said data items, said name table containing name table entries corresponding to the names contained in said selected instructions in the sequence associated with said name table;

said name resolution means further includes a current name table address specifying the name table associated with the instruction sequence currently being executed and locates the name table entry corresponding to said received name by means of said received name and said current name table address; and

said current name table address can only be changed as a result of said call operations and said return operations.

12. In the digital computer system of claim 10, and further wherein:

said name resolution means includes a plurality of said architectural base addresses;

each of said name table entries contains

(a) a base specifier for specifying how a base address of said addresses is to be derived using said architectural base addresses and

(b) a displacement specifier from which a displacement value may be derived; and

further wherein

said name resolution means derives the address of said represented item by deriving a base address as specified by said base specifier and a displacement as specified by said displacement specifier and by adding said displacement to said base address; and

said architectural base addresses can only be changed as a result of said call operations and said return operations.

13. In the digital computer system of claim 12, and further wherein:

each of said sequences of instructions is permanently associated with a name table of data items, said name table containing name table entries corresponding to names contained in certain instructions in the sequence of instructions associated with said name table;

said name resolution means further includes a current name table address of said addresses specifying the name table associated with the sequence of instructions currently being executed and locates the name table entry corresponding to said received name by means of said received name and said current name table address; and

said current name table address can only be changed as a result of said call operations and said return operations.

14. In the digital computer system of claim 12, and further wherein:

said data items further include a plurality of process items, each of said process items containing data items associated with the executions of certain procedures, each one of said process items including

(a) at least one frame of said process items, each of said frames corresponding to one execution of said certain procedures, and

(b) a static data area of said process items associated with at least one execution of said certain procedures; and

said plurality of current architectural base addresses includes

(a) a frame address to which said displacement values are added to specify locations in the frame corresponding to said current execution,

(b) a static data address to which said displacement values are added to specify locations in said static data area associated with said current execution, and

(c) a procedure base address to which said displacement values are added to specify locations in the procedure whose instructions are being executed in said current execution.