Direct conversion radio receiver for FM signals

• US 4,521,892 A
• Filed: 09/08/1982
• Issued: 06/04/1985
• Est. Priority Date: 09/24/1981
• Status: Expired due to Fees

• Current Assignee: STC PLC (f/k/a Standard Telephones and Cables)
• Original Assignee: International Standard Electric Corporation (ITT, Inc.)
• Inventors: Vance, Ian A. W., Goatcher, John K.
• Primary Examiner(s): Griffin, Robert L.
• Assistant Examiner(s): Glenny, Raymond C.
• Application Number:
  US06/415,782
• Time in Patent Office: 1,000 Days
• Field of Search: 375/80, 375/82, 375/88, 375/89, 375/86, 375/122, 329/50, 329/110, 329/122, 329/124, 328/133, 307/471, 307/514, 307/517, 370/11
• US Class Current: 375/334
• CPC Class Codes: H03D 3/007 by converting the oscillations into two quadrature related signals H03D3/245 takes precedence
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H04L 27/1525 using quadrature demodulation

Abstract

A radio receiver for FM signals having a demodulation system to produce an approximation to an analog output by either measuring the time intervals between successive zero crossings in the I.F. (FIG. 1, FIG. 2B) or by filtering pulses produced at each zero crossing of the I.F. (FIG. 1, FIG. 2A). The demodulator includes two signal pathways in quadrature phase relation, the second signal either lagging or leading the first signal in dependence on whether the received signal frequency is above or below a local oscillator frequency. The modulation frequency can carry analog information separate and apart from the on-off (digital) information.

Claims

1. In or for a radio receiver for receiving frequency modulated signals with a varying frequency difference from a carrier frequency, and in which mixing with a local oscillator is used to produce quadrature baseband channels, a demodulator circuit comprising a first channel in which a first baseband signal at the difference frequency will appear, a second channel in which a second baseband signal at the difference frequency will appear in quadrature with respect to the first channel and lagging or leading the first baseband signal in dependence upon the received signal frequency being above or below the local oscillator frequency, respectively;

and means for converting the outputs of said channels into an analog signal having an amplitude representative of the difference frequency.

2. The demodulator circuit according to claim 1, wherein said converting means includes for each channel a first monostable pulsing circuit which is edge-triggered and produces in response thereto a short output pulse, a time-reciprocal network for producing in response to each zero crossing by the respective baseband signal a signal whose magnitude is representative of the reciprocal of the time interval between successive zero crossings and a switch, wherein the switches are controlled by the output from the monostable circuits such as to periodically sample the outputs of the time-reciprocal networks for filtering.

3. The demodulator according to claim 2 wherein the time-reciprocal network is arranged to provide a signal whose magnitude varies to represent the reciprocal of time for time intervals in excess of a predetermined time interval t_min, the magnitude of said signal being held constant until the interval t_min has elapsed, whereby a starting point on the time reciprocal curve t^-1 is reached before sampling of the network output commences.

4. The demodulator according to claim 3 comprising for each channel a second pulsing circuit providing a pulse of length t_min in respect to each zero crossing by the respective baseband signal to initiate the time reciprocal network.

5. The demodulator according to claim 4 comprising selector logic for controlling the switches, which are analogue switches, periodically in response to output from the first pulsing circuit and from each zero crossing direct from one of the first and second channels.

6. The demodulator according to claim 2, wherein said signal from the time reciprocal circuit has a linear decay.

7. The demodulator according to claim 2, wherein said time reciprocal circuit signal has an exponential decay.

8. The demodulator according to claim 2, wherein said time-reciprocal circuit signal has the combination of a linear and an exponential decay.

9. The demodulator according to claim 2, wherein said time reciprocal circuit provides a non-linear transfer characteristic as a piece-wise linear approximation of exact inversion.

10. The demodulator according to claim 1, wherein said converting means includes a fast clock, means to provide a digital signal representing the count of the clock periods occurring during the interval between each successive zero crossing, means to invert the digital signal and means to convert the digital signal to an analogue output.

11. The demodulator according to claim 1, wherein said converting means includes, for each channel, means for generating a trigger pulse in response to the occurrence of a zero crossing by the respective baseband signal, a ramp generator which is initiated by the trigger pulse, an oscillator variable in dependence of the output of the ramp generator, and means for counting the cycles of the varied oscillator between initiation by one pulse and cessation by a subsequent pulse from the opposite channel.

12. The demodulator according to claim 1 further comprising for each channel a further channel carrying the inverse of the signals in said each channel.

13. The demodulator according to claim 1, said converting means including a pulse producing circuit for producing a pulse of the correct polarity for each edge of the respective baseband signal in the first or second channel, the circuit comprising a first exclusive OR gate for receiving the signals of said first and second channels and in each channel and in the output path of said first exclusive OR gate, respective first, second and third monostable circuits triggerable by positive or negative going pulses, a flip-flop circuit arranged to receive the output of the first and second monostable circuits, a second exclusive-OR gate arranged to receive the output of the flip-flop and the output of the first exclusive OR gate, an analog switch controlled by the third monostable for outputting the second exclusive OR gate output, and a bias network connected to the output of said analog switch in such a manner as to produce a 3-state analogue output.

14. The demodulator circuit according to claim 1, wherein said converting means includes means for measuring the time intervals between successive zero crossings by the respective baseband signals, and means for generating said output signal as a function of the reciprocal of the time intervals.

15. The demodulator circuit according to claim 1, wherein said converting means includes means for producing pulses at zero crossings by the respective baseband signals, and means for filtering such pulses.

16. The demodulator circuit according to claim 14 or 15 further comprising means for providing at least two additional phases of the difference frequency in a respective third and fourth channels, and wherein said converting means is additionally operative on the outputs of said third and fourth channels.