Pulse-width modulation circuit with carrier signal frequency control

• US 4,524,335 A
• Filed: 03/10/1983
• Issued: 06/18/1985
• Est. Priority Date: 03/13/1982
• Status: Expired due to Term

• Current Assignee: Nippon Yusen Kabushiki Kaisha
• Original Assignee: Nippon Yusen Kabushiki Kaisha
• Inventors: Yokoyama, Kenji
• Primary Examiner(s): Laroche, Eugene R.
• Assistant Examiner(s): Pascal, Robert J.
• Application Number:
  US06/473,777
• Time in Patent Office: 831 Days
• Field of Search: 332/9 R, 332/10, 332/15, 375/22, 330/10
• US Class Current: 332/110
• CPC Class Codes: H03K 7/08 Duration or width modulation ; Duty cycle modulation

Abstract

A pulse-width modulation circuit detects a signal level or amplitude of an audio signal by means of an absolute value detecting circuit. The detected level is applied to a control terminal of a voltage-controlled oscillator. The output of the voltage-controlled oscillator is used as a carrier signal of the pulse-width modulation circuit, and the frequency thereof is controlled in such a manner that the carrier frequency is lowered as the audio signal level increases. Higher order harmonics of the pulse-width-modulated output signal both at high and low modulation factors are made substantially the same in amount. Thus, a band width required for the circuit is remarkedly narrowed, and improvement in distortion factor can be attained regardless of a low cost to manufacture.

Claims

1. A pulse-width modulation circuit comprising:

pulse-width modulation means in which a carrier signal is pulse-width-modulated by an input signal to generate a pulse signal having a duty factor corresponding to a level of said input signal;

level detecting means for detecting a level corresponding to said level of the input signal; and

carrier signal generating means for generating said carrier signal for said pulse-width modulation means, said carrier signal having a frequency which deviates in accordance with the detected level of said level detecting means, the frequency of said carrier signal being decreased as said detected level increases.

2. A pulse-width modulation circuit as claimed in claim 1, wherein

said pulse-width modulation means is comprised of a direct feedback type pulse-width modulation circuit in which said pulse-width-modulated carrier signal is directly fed back to an input side of said circuit;

and

said carrier signal generating means includes a voltage-controlled oscillator whose output is used as said carrier signal;

and wherein an oscillation frequency of said voltage-controlled oscillator deviates in accordance with said detected level of said level detecting means.

3. A pulse-width modulation circuit as claimed in claim 1 wherein said pulse width modulation means and carrier signal generating means are combined in a self-oscillation type pulse-width modulation circuit having an oscillation frequency which deviates in accordance with said level of said level detecting means.

4. A pulse-width modulation circuit as claimed in claim 1, wherein said carrier signal generating means comprises:

a Miller integrator whose input terminal is supplied with said detected level of said level detecting means;

a hysteresis comparator whose input terminal is supplied with an output from said Miller integrator and having a comparator output a fraction of of said comparator output being fed back to said input terminal of said Miller integrator through a resistor;

a flip-flop circuit which frequency-divides said comparator output; and

an integrator circuit having an input terminal connected to an output of said flip-flop, and an integrator output which is supplied to said pulse-width modulation circuit as said carrier signal.

5. A pulse-width modulation circuit as claimed in claim 4, further comprising an integration circuit which integrates an output from said flip-flop circuit.

6. A pulse-width modulation circuit as claimed in claim 1, wherein said pulse signal is demodulated by a low-pass filter and is delivered to a load thereafter.