Self-adjusting video camera

• US 4,525,741 A
• Filed: 11/03/1982
• Issued: 06/25/1985
• Est. Priority Date: 11/03/1982
• Status: Expired due to Term

• Current Assignee: NCR Corporation (NCR Voyix Corporation)
• Original Assignee: NCR Corporation (NCR Voyix Corporation)
• Inventors: Therrien, Roger H., Chahal, Maninderpal S.
• Primary Examiner(s): NOT, DEFINED
• Assistant Examiner(s): Leu, Robert
• Application Number:
  US06/438,826
• Time in Patent Office: 965 Days
• Field of Search: 358/209, 358/213, 358/212, 358/169, 358/168, 358/171, 358/174, 358/294, 358/167, 358/280
• US Class Current: 348/255
• CPC Class Codes: H04N 23/76 by influencing the image signals
• CPC Class Codes: H04N 25/00 Circuitry of solid-state image sensors [SSIS]; Control thereof

Abstract

Disclosed is an automatic self-adjusting CCD activated video camera circuit for adjusting the various CCD channel offset and gain values to the desired levels by utilizing the channels'"'"' digitized internal black and white references. Two identical feedback loops are used for offset and gain adjustment, respectively. In the gain/offset adjust loop, the white/black reference is compared to a desired gain/offset set by jumpers or switches on the video camera board. A difference in these values causes a corresponding 10 bit counter to increase or decrease its value. The digital counter value is converted to an analog signal and is used to optimally modify the channel gain/offset.

Claims

1. A solid state imaging apparatus for receiving a plurality of input analog signals having individual white and black references and generating corresponding digital output signals having gain and offset values equivalent to a preselected gain reference and offset reference, respectively, said apparatus comprising:

a plurality of gain adjust means each receptive of one of said input signals and responsive to a gain adjust signal for adjusting the gain of said signals to said preselected gain reference;

a plurality of offset adjust means each connected to one of said gain adjust means and responsive to an offset adjust signal for adjusting the offset of said signals to said preselected offset reference;

a plurality of analog-to-digital converter means each coupled to said offset adjust means for digitizing said signal;

demultiplexer means coupled to said plurality of analog-to-digital converter means for merging said plurality of digitized signals and generating said digital output signals;

a plurality of gain adjustment feedback loops, one corresponding to each of said input signals, connected between said demultiplexer means and one of said gain adjust means for generating said gain adjust signals; and

a plurality of offset adjustment feedback loops, one corresponding to each of said input signals, connected between said demultiplexer means and one of said offset adjust means for generating said offset adjust signal.

2. A CCD imaging apparatus for receiving a first and second analog input signal having at least individual white and black references and generating corresponding digital output signals having gain and offset values equal to a preselected gain reference and offset reference, respectively, said apparatus comprising:

first gain adjust means receptive of said first input signal and responsive to a first gain adjust signal for adjusting the gain of said first signal to said preselected gain reference;

second gain adjust means receptive of said second input signal and responsive to a second gain adjust signal for adjusting the gain of the second signal to said preselected gain reference;

first offset adjust means connected to the first gain adjust means and responsive to a first offset adjust signal for adjusting the offset of said first signal to said preselected offset reference;

second offset adjust means connected to the second gain adjust means and responsive to a second offset adjust signal for adjusting the offset of said second signal to said preselected offset reference;

first analog-to-digital converter means connected to said first offset adjust means for digitizing said first signal;

second analog-to-digital converter means connected to the second offset adjust means for digitizing said second signal;

demultiplexer means coupled to said first and second converter means for combining the first and second digitized signals into a serial data consisting of at least said black and white references;

a first offset adjustment feedback loop connected between the demultiplexer means and the first offset adjust means for generating said first offset adjust signal;

a second offset adjustment feedback loop connected between the demultiplexer means and the second offset adjust means for generating said second offset adjust signal;

a first gain adjustment feedback loop connected between the demultiplexer means and the first gain adjust means for generating said first gain adjust signal; and

a second gain adjustment feedback loop connected between the demultiplexer means and the second gain adjust means for generating said second gain adjust signal.

3. The apparatus as recited in claim 2 wherein said first offset adjustment feedback loop comprises:

first digital comparator means for comparing the digitized first black reference with the preselected offset reference and generating a comparison signal of greater than, equal to, or less than;

first counter means responsive to said comparison signal for producing an output count; and

5. The apparatus as recited in claim 2 wherein said second offset adjustment loop comprises:

first digital comparator means for comparing the digitized first black reference with the preselected offset reference and generating a comparison signal of greater than, equal to or less than;

second counter means responsive to said comparison signal for producing an output count; and

second digital-to-analog means connected to said second counter means for translating said second counter means output count into the equivalent second offset adjustment signal.

6. The apparatus of claim 2 wherein said first gain adjustment feedback loop comprises:

second digital comparator means for comparing the digitized white reference with the preselected gain reference and generating a comparison signal of greater than, equal to, or less than;

third counter means responsive to said comparison signal for producing an output count; and

third digital-to-analog converter means connected to said third counter means for translating said third counter output count into the equivalent first gain adjust signal.

7. The apparatus of claim 2 wherein said second gain adjustment feedback loop comprises:

second digital comparator means for comparing the digitized white reference with the preselected gain reference and generating a comparison signal of greater than, equal to, or less than;

fourth counter means responsive to said comparison signal for producing an output count; and

fourth digital-to-analog converter means connected to said fourth counter means for translating said fourth counter output count into the equivalent second gain adjust signal.

8. The apparatus as in claim 2 wherein said first and second gain adjust means are variable resistance circuits.

9. The apparatus as in claim 2 wherein said first and second offset adjust means are voltage-to-current converter circuits.

10. The apparatus of claim 3 or 4 further comprising counter enable logic means connected between said first comparator means and said first and second counter means for operating said first and second counter means.

11. The apparatus of claim 5 or 6 further comprising counter enable logic means connected between said second comparator means and said third and fourth counter means for operating said third and fourth counter means.

13. The apparatus of claim 11 wherein said photosensitive means is a charge coupled device.

14. The apparatus as in claim 11 further comprising:

first counter enable logic means coupled to said first comparator means and the first and second counter means for operating said first and second counter means; and

second counter enable logic means coupled to said second comparator means and the third and fourth counter means for operating said third and fourth counter means.

16. The circuit as in claim 14, wherein said gain adjustment feedback loop comprises

digital comparator means for comparing the digitized signal with the preselected gain reference value and generating a comparison signal;

counter means responsive to said comparison signal for developing an output count; and

digital-to-analog converter means connected to said counter means for producing an analog signal equivalent to said output count.

17. The circuit as in claim 14 wherein said offset adjustment feedback loop comprises:

digital comparator means for comparing the digitized signal with the preselected offset reference value and generating a comparison signal;

counter means responsive to said comparison signal for developing an output count; and

digital-to-analog converter means connected to said counter means for producing an analog signal equivalent to said output count.

19. The circuit as set forth in claim 16 further comprising counter enable logic means connected between said comparator means and counter means for operating said counter means.

4. first digital-to-analog means connected to said first counter means for translating said output count into the equivalent first offset adjust signal.

12. A solid state imaging apparatus comprising:

photosensitive means for generating a first analog signal consisting of at least a black reference and a white reference and a second analog signal consisting of at least a black reference and a white reference;

first gain adjust means receptive of said first analog signal from the photosensitive means and responsive to a first analog gain adjust signal for adjusting the first signal gain to equal a preselected gain reference;

second gain adjust means receptive of said second analog signal from the photosensitive means and responsive to a second analog gain adjust signal for adjusting the second signal gain to equal a preselected gain reference;

first offset adjust means connected to said first gain adjust means and responsive to a first analog offset adjust signal for adjusting the first signal offset to equal a preselected offset reference;

second offset adjust means connected to said second gain adjust means and responsive to a second analog offset adjust signal for adjusting the second signal offset to said preselected offset reference;

first analog-to-digital converter means connected to said first offset adjust means for digitizing said first signal;

second analog-to-digital converter means connected to said second offset adjust means for digitizing said second signal;

demultiplexer means coupled to said first and second converter means for merging the first and second digitized signals;

first comparator means connected to the demultiplexer means for comparing the black references of said signals with said preselected offset reference and generating a first comparison signal corresponding to the comparison of the first signal black reference with the offset reference and a second comparison signal corresponding to the comparison of the second signal black reference with the offset reference;

second comparator means connected to the demultiplexer means for comparing the white references of said signals with said preselected gain reference and generating a third comparison signal corresponding to the comparison of the first signal white reference with the gain reference and a fourth comparison signal corresponding to the comparison of the second signal white reference with the gain reference;

first counter means responsive to the first comparison signal and operative to begin counting and develop an output count;

second counter means responsive to the second comparison signal and operative to begin counting and develop an output count;

third counter means responsive to the third comparison signal and operative to begin counting and develop an output count;

fourth counter means responsive to the fourth comparison signal and operative to begin counting and develop an output count;

first digital-to-analog converter means coupled to said first counter means for producing the first analog offset adjust signal corresponding to the count in said first counter means;

second digital-to-analog converter means coupled to said second counter means for producing the second analog offset adjust signal corresponding to the count in said second counter means;

third digital-to-analog converter means coupled to said third counter means for producing the first analog gain adjust signal corresponding to the count in said third counter means; and

fourth digital-to-analog converter means coupled to said fourth counter means for producing the second analog gain adjust signal corresponding to the count in said fourth counter means.

15. A charge coupled device (CCD) video camera interface circuit having a circuit input terminal for receiving a CCD input analog signal having a gain and an offset value and a video output terminal for outputting a CCD signal having gain and offset values equal to preselected gain reference and offset reference values, respectively, comprising:

gain adjust means connected to said circuit input for adjusting the gain of the analog signal received from said CCD;

offset adjust means connected to said gain adjust means for adjusting the offset of the CCD signal received from said gain adjust means;

analog-to-digital converter means connected to said offset adjust means for digitizing said CCD signal;

a gain adjustment feedback loop connected between the analog-to-digital converter means and said gain adjust means for effecting adjustment of the signal gain value to said preselected gain reference value; and

an offset adjustment feedback loop connected between the analog-to-digital converter means and said offset adjust means for affecting adjustment of the signal offset value to the preselected offset reference value.

18. The circuit as set forth in claim 15 further comprising counter enable logic means connected between said comparator means and the counter means for operating said counter means.