Method of and circuitry for detecting, at a telephone exchange, the lifting of a subscriber's handset in response to ringing current emitted by the exchange

• US 4,528,425 A
• Filed: 03/24/1983
• Issued: 07/09/1985
• Est. Priority Date: 03/24/1982
• Status: Expired due to Fees

• Current Assignee: Cselt - Centro Studi E Laboratori Telecommunicazioni SPA
• Original Assignee: Cselt - Centro Studi E Laboratori Telecommunicazioni SPA
• Inventors: Sartori, Mario, Melindo, Flavio
• Primary Examiner(s): Rubinson, Gene Z.
• Assistant Examiner(s): Di Vito, Elio
• Application Number:
  US06/478,470
• Time in Patent Office: 838 Days
• Field of Search: 179/18 HB, 179/18 FA, 179/84 A, 179/84 R
• US Class Current: 379/382
• CPC Class Codes: H04M 19/026 Arrangements for interrupting the ringing current

Abstract

In order to detect at an electronic telephone exchange the lifting of a subscriber'"'"'s handset in response to ringing current sent over the line loop from a generator at that exchange, a charging current proportional to the incoming line current is fed to a capacitor over a recurrent integration period encompassing one or more whole ringing-current cycles. When the handset has been taken off the hook, the capacitor charge present at the end of such a period differs from zero on account of a d-c component superimposed upon the alternating ringing signal. In order to enable the use of a relatively small storage capacitor, the charging current is periodically interrupted by a train of chopping pulses. When the line current is measured at the exchange by a sensor responsive only to absolute magnitude, the polarity of the charging current is reversed in alternate nonzero-amplitude periods of a cycle.

Claims

1. A method of detecting at a telephone exchange, provided with a generator ringing current of low audio frequency connectable across a line loop leading to a called subscriber station, a response of the called subscriber which involves closure of a normally open hook switch shunting a series capacitor in the line forming said loop whereby a continuous voltage applied to the line at the exchange gives rise to a direct-current component superimposed upon the alternating ringing current,

comprising the steps of:

(a) sensing the line current circulating in said loop during emission of ringing current in the presence of said continuous voltage, with generation of a monitoring current whose absolute amplitude varies proportionally with that of said line current;

(b) integrating a bipolar current, derived from said monitoring current and proportional to the sensed line current, during a recurrent measuring period spanning a whole number of ringing-current cycles;

(c) comparing the result of integration in step (b) at the end of each measuring period with a predetermined minimum value to determine the existence of a mean amplitude indicative of said direct-current component; and

(d) discontinuing the emission of ringing current in response to said mean amplitude.

2. A method as defined in claim 1 wherein the integration in step (b) involves the charging of a storage capacitor with said bipolar current, followed by a discharge of said storage capacitor immediately after comparing the voltage thereacross with said minimum value in step (c).

3. A method as defined in claim 2 wherein, for limiting the final voltage existing across said storage capacitor at the end of a measuring period, said bipolar current is periodically chopped in step (b) at a pulse rate substantially higher than the frequency of said ringing current.

4. A method as defined in claim 2 wherein only the absolute magnitude of the line current is sensed in step (a) whereby said monitoring current has two pulsation periods of the same polarity in each cycle of said line current, the bipolar current charging the storage capacitor in step (b) being derived from said monitoring current with a reversal of polarity in alternate pulsation periods thereof.

5. In a telephone system wherein an exchange is linked with an associated subscriber station via a two-conductor line whose conductors are interconnected at said station by a ringer in series with a capacitor shunted by a normally open hook switch, said ringer being operable in an open state of said hook switch by alternating current of low audio frequency transmitted over said line along with a continuous voltage whereby a direct-current component is superimposed upon said alternating current on closure of said hook switch,

the combination therewith of circuitry for detecting said direct-current component as a signal that the hook switch has been closed, said circuitry comprising:

sensing means coupled to said line for producing a monitoring current of a magnitude proportional at least in absolute magnitude to the line current;

conversion means connected to said sensing means for deriving from said monitoring current a bipolar current proportional to said line current;

timing means responsive to said alternating current for establishing a recurrent measuring period spanning a whole number of cycles of said low audio frequency;

integrating means connected to said conversion means and controlled by said timing means for determining the mean amplitude of said bipolar current over each measuring period; and

comparison means connected to said integrating means for signaling a surpassing of a predetermined minimum value by said mean amplitude.

6. The combination defined in claim 5 wherein said integrating means comprises a storage capacitor chargeable with said bipolar current.

7. The combination defined in claim 6 wherein said storage capacitor is provided with a normally blocked discharge path coupled with said timing means for unblocking at the end of each measuring period, said comparison means being activable by said timing means just prior to the unblocking of said discharge path.

8. The combination defined in claim 7 wherein said circuitry further comprises a generator of chopping pulses, of a recurrence rate substantially exceeding said low audio frequency, connected to said integrating means for periodically interrupting the charging of said storage capacitor a multiplicity of times during each measuring period.

9. The combination defined in claim 7 wherein said integrating means comprises a positive supply lead, a negative supply lead, first transistor means inserted between said storage capacitor and said positive supply lead, and second transistor means inserted between said storage capacitor and said negative supply lead, said first and second transistor means being controlled by said conversion means for conducting during alternate nonzero-amplitude periods in each cycle of said monitoring current.

10. The combination defined in claim 9 wherein said monitoring current is unipolar, said conversion means including threshold means sensitive to the magnitude of said monitoring current for switching between said first and second transistor means.

11. The combination defined in claim 10 wherein said threshold means comprises a voltage comparator connected across a grounded resistor, said sensing means having an output connected across said resistor together with a source of constant biasing current having a polarity opposite that of said monitoring current, and a flip-flop alternately settable and resettable by said voltage comparator in response to zero amplitude of said monitoring current.

12. The combination defined in claim 9 wherein said first and second transistor means include transistor pairs connected as current mirrors.

13. The combination defined in claim 9 wherein said discharge path includes a diode bridge with one diagonal connected between said supply leads and another diagonal connected across said storage capacitor.

14. The combination defined in claim 5 wherein said timing means comprises a shift register with a plurality of cascaded binary stages, limiter means connected to a generator of said alternating current for converting same to a square wave fed to the first of said stages, a source of high-frequency stepping pulses connected in parallel to clock inputs of said stages, and a coincidence gate with inputs connected to outputs of the first and the last of said stages for conducting at the beginning of a cycle of said square wave during a small fraction of said cycle.

15. The combination defined in claim 7 wherein said integrating means is provided with gate means connected to said timing means for blocking the charging of said storage capacitor during the unblocking of said discharge path.