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System for periodically reading all memory locations to detect errors

  • US 4,532,628 A
  • Filed: 02/28/1983
  • Issued: 07/30/1985
  • Est. Priority Date: 02/28/1983
  • Status: Expired due to Fees
First Claim
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1. In a computer system including a solid state memory with a plurality of addressable locations and an error detector/corrector circuit for checking data as it is read from the memory and correcting the data if a detectable error has occurred, the corrected data being stored in the addressed memory location to assure that the correct data is in memory, a circuit to identify all directly addressable memory locations present and to periodically read each present location comprising, in combination:

  • address generator means operative during a search mode for producing each directly addressable memory location;

    read request means to request, during said search mode, that each address produced by said address generator be read by the memory;

    storage means responsive to each read request to store an indication from the memory whether the addressed location is present or not present;

    said address generator operative during a normal run mode to generate periodically all possible directly addressable locations at a rate slower than addresses are generated thereby during said search mode;

    means operative during normal run mode, and responsive to said storage means and said address generator to initiate a memory read whenever the address produced by said address generator is indicated to be present by the data in said storage means.

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