Multiple voltage switching power supply having output voltage limiting
First Claim
1. A multi-output-voltage switching power supply comprising:
- a pair of fifty percent duty cycle switches connected in series with each other across a pair of incoming power lines, each of said switches having an internal shunting capacitance;
first control means for alternately closing said fifty percent duty cycle switches, with each of said switches being closed for substantially the same time as the other;
a plurality of pairs of first and second pulse-width modulated switches connected in series with each other across said incoming power lines, respectively, each of said switches having an internal shunting capacitance;
respective power supply circuits connected from the junction between each pair of interconnected pulse-width modulated switches to the junction between said fifty percent duty cycle switches, each of said power supply circuits generating a DC output voltage that is a function of the closure times of its respective pulse-width modulated switches; and
respective pulse-width modulated control means operating in synchronism with said first control means for closing said second pulse-width modulated switch in each pair for a portion of the time that said first fifty percent duty cycle switch is closed, and for closing said first pulse-width modulated switch for a portion of the time that said second fifty percent duty cycle switch is closed, the closure time of said pulse-width modulated switches being adjusted to maintain the DC output voltage at a predetermined value, whereby N DC output voltages can be generated from N+1 pairs of series-connected switches;
comparator means for generating a no-load indicating signal in response to said output voltage exceeding a predetermined value; and
gating means energized by said no-load indicating signal for altering the operation of said pulse-width modulated control means so that said pulse-width modulated switches operate in synchronism with said fifty percent duty cycle switches so that the voltage at the junction between the respective pairs of pulse-width modulated switches is always equal to the voltage at the junction between the fifty percent duty cycle switches, whereby the voltage applied to the power supply circuit connected therebetween is always zero.
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Accused Products
Abstract
A multi-voltage switching power supply having a first pair of switches connected in series with each other across a pair of incoming power lines. The switches are alternately closed at a fifty percent duty cycle. A plurality of pairs of series-connected switches are also connected between the incoming power lines and operated in a pulse-width modulated mode. Power supply circuits are connected between the junction of the pulse-width modulated switches of each pair and the junction of the fifty percent duty cycle switches. The peak value of the current applied to the power supply circuit, which determines the power supply output voltage, is controlled by adjusting the closure time of the pulse-width modulated switches.
30 Citations
13 Claims
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1. A multi-output-voltage switching power supply comprising:
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a pair of fifty percent duty cycle switches connected in series with each other across a pair of incoming power lines, each of said switches having an internal shunting capacitance; first control means for alternately closing said fifty percent duty cycle switches, with each of said switches being closed for substantially the same time as the other; a plurality of pairs of first and second pulse-width modulated switches connected in series with each other across said incoming power lines, respectively, each of said switches having an internal shunting capacitance; respective power supply circuits connected from the junction between each pair of interconnected pulse-width modulated switches to the junction between said fifty percent duty cycle switches, each of said power supply circuits generating a DC output voltage that is a function of the closure times of its respective pulse-width modulated switches; and respective pulse-width modulated control means operating in synchronism with said first control means for closing said second pulse-width modulated switch in each pair for a portion of the time that said first fifty percent duty cycle switch is closed, and for closing said first pulse-width modulated switch for a portion of the time that said second fifty percent duty cycle switch is closed, the closure time of said pulse-width modulated switches being adjusted to maintain the DC output voltage at a predetermined value, whereby N DC output voltages can be generated from N+1 pairs of series-connected switches; comparator means for generating a no-load indicating signal in response to said output voltage exceeding a predetermined value; and gating means energized by said no-load indicating signal for altering the operation of said pulse-width modulated control means so that said pulse-width modulated switches operate in synchronism with said fifty percent duty cycle switches so that the voltage at the junction between the respective pairs of pulse-width modulated switches is always equal to the voltage at the junction between the fifty percent duty cycle switches, whereby the voltage applied to the power supply circuit connected therebetween is always zero. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A multi-voltage switching power supply comprising:
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first and second fifty percent duty cycle switches connected in series with each other across a pair of incoming power lines; a plurality of pairs of first and second pulse-width modulated switches connected in series with each other across said incoming lines, respectively; a transformer for each pair of series-connected, pulse-width modulated switches, the primary windings of respective transformers connecting the junction between each pair of pulse-width modulated switches to the junction between said fifty percent duty cycle switches; a power supply circuit connected to the secondary of each transformer, said power supply circuit generating a DC output voltage having a magnitude proportional to the absolute value of the current through said transformer; a voltage comparator for each power supply circuit, said voltage comparator receiving the DC output voltage from said power supply circuit and a reference voltage, said voltage comparator generating an output voltage error signal having a magnitude proportional to the difference therebetween; current-sensing means for each pair of series-connected, pulse-width modulated switches, said current-sensing means generating a current-indicating signal having a magnitude proportional to the current flowing through the primary of the transformer connected thereto; a pulse-width comparator for each pair of series-connected, pulse-width modulated switches, said pulse-width comparator receiving said output voltage error signal and said current-indicating signal, and generating a pulse-width termination signal when said current-indicating signal exceeds said output voltage; an oscillator generating a constant-frequency clock signal; first bi-stable means switching between first and second states in response to said clock signal, said bi-stable means closing said first fifty percent duty cycle switch and opening said second fifty percent duty cycle switch in said first state and opening said first fifty percent duty cycle switch and closing said second fifty percent duty cycle switch in the second state; second bi-stable means for each pair of series-connected, pulse-width modulated switches, said second bi-stable means being switched to a first state as said first bi-stable means switches states, and being switched to a second state by said pulse-width termination signal, said second bi-stable means generating a switch closure signal in said first state; and first and second gate means enabled by said first bi-stable means, said first gate means being enabled when said first bi-stable means is in said second state and said second gate being enabled when said first bi-stable means is in said first state, said first and second gate means further receiving said switch closure signal from said second bi-stable means so that gate means generate respective switch-actuating signals when enabled upon receipt of said switch closure signal, the switch-actuating signal from said first gate means closing said first pulse-width modulated switch and the switch-actuating signal from said second gate means closing said second pulse-width modulated switch. - View Dependent Claims (12, 13)
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Specification