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Control of serial memory

  • US 4,535,427 A
  • Filed: 12/06/1982
  • Issued: 08/13/1985
  • Est. Priority Date: 12/06/1982
  • Status: Expired due to Term
First Claim
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1. An integrated circuit serial memory comprising:

  • an array of memory cell elements;

    writing means for writing data sequentially into said array;

    reading means for reading data sequentialy out of said array; and

    control means for setting flags indicating memory-full and memory-empty states;

    characterized in that;

    said array comprises a two dimensional array of non-shifting memory cells, having an X and a Y dimension;

    said writing means includes a first write shift register carrying a first write pointer bit along the X dimension of said array and a second write shift register carrying a second write pointer bit along the Y dimension of the array, which first and second write shift register pointer bits point in the X and Y dimensions to a write cell; and

    said reading means includes a first read shift register carrying a first read pointer bit along the X dimension of said array and a second read shift register carrying a second read pointer bit along the Y dimesion of said array, which first and second read shift register pointer bits point in the X and Y dimensions to a read cell.

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