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Chip-type inductor

  • US 4,543,553 A
  • Filed: 05/16/1984
  • Issued: 09/24/1985
  • Est. Priority Date: 05/18/1983
  • Status: Expired due to Term
First Claim
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1. A chip-type inductor comprising a laminated structure of n magnetic layers, n being a natural number greater than or equal to 4, where linear conductive patterns extending between the magnetic layers are connected successively in a form similar to a coil so as to produce an inductance component, characterized in that:

  • of the n magnetic layers, the uppermost first magnetic layer is provided with a conductive pattern formed on the lower surface thereof and the lowermost nth magnetic layer and the adjacent n-1th magnetic layer are provided with respective conductive patterns on the upper surfaces thereof;

    each of the second to the n-2th magnetic layers is provided with a respective pair of conductive patterns, one of the pair being located on the upper surface thereof, the other of the pair being located on the lower surface thereof, each of said second to n=2th magnetic layers insulating its respective pair of conductive patterns from one another;

    the conductive pattern formed on the lower surface of the first to the n-2th magnetic layers being in direct contact with the conductive pattern formed on the upper surface of the second to n-1th magnetic layers, respectively;

    in each of the second to the n-1th magnetic layers, a respective, electrically non-conductive, through-hole is formed in a region where no conductive pattern is formed in the layer;

    the conductive pattern formed on the upper surface of the third through nth magnetic layer being connected to the conductive pattern formed on the lower surface of the first through n-2th magnetic layers, respectively, via the through-hole formed in the second through n-1th magnetic layers, respectively; and

    lead out electrodes are connected to the conductive layers formed on the first and nth electrodes, respectively.

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