Fast automatic gain control arrangement

• US 4,546,326 A
• Filed: 01/28/1983
• Issued: 10/08/1985
• Est. Priority Date: 02/03/1982
• Status: Expired due to Fees

• Current Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Original Assignee: US Philips Corporation (Koninklijke Philips N.V.)
• Inventors: Van Uffelen, Jean-Pierre H., LeBourg, Michel, Robillard, Daniel
• Primary Examiner(s): Mullins, James B.
• Application Number:
  US06/461,718
• Time in Patent Office: 984 Days
• Field of Search: 330/127, 330/129, 330/141, 330/278, 330/281, 455/185, 455/186, 455/234, 455/244, 375/58
• US Class Current: 330/129
• CPC Class Codes: H03G 3/3052 in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver H03G3/32, H03G3/34 take precedence

Abstract

Fast automatic gain control (AGC) arrangement provided in an RF receiver which receives data from high-rate multiple transmission channels, in which the AGC amplifier (1) is controlled by a control voltage read from a random access memory RAM (2) which renders it possible to repeat once or several times consecutively the measurement and the correction of the output voltage of the amplifier during the period of time in which a channel is in use, the control voltage correction signal being processed in a circuit (6-10) for measuring and comparing the output voltage of the AGC amplifier to which a read-only memory (PROM)(11) is added which provides a means for correcting the imperfections of the amplifier (1) and of said measuring and comparison circuit.

Claims

1. A fast automatic gain control arrangement for use in an intermediate frequency portion of a radio-frequency receiver which receives data from multiple transmission channels with frequent channel change, the arrangement comprising:

an amplifier having an imput signal terminal, an output signal terminal, and a control signal terminal;

means for storing a digital control signal, the digital control signal depending upon the frequency of an input signal present at the input terminal, the storing means having an output connected to the control signal terminal of the amplifier and also having a corrected digital control signal input;

means for measuring an output signal present at the output signal terminal and producing a digital correction signal which depends upon the output signal;

means for producing a readjusted digital correction signal which depends upon the digital control signal and also upon the digital correction signal, the readjusted digital correction signal producing means having an output, and

means for adding the digital control signal and the readjusted digital correction signal and producing a corrected digital control signal at an output of the adding means, the output of the adding means being connected to the corrected digital control signal input of the storing means.

2. An arrangement as claimed in claim 1, wherein the storing means includes a random access memory.

3. An arrangement as claimed in claim 2, further comprising a frequency-address generator connected to the random access memory.

4. An arrangement as claimed in claim 1, wherein the means for producing a readjusted digital correction signal includes a read-only memory connected between the adding means and the measuring and producing means.