Non-volatile memory cell fuse element
DCFirst Claim
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1. A semiconductor circuit for enabling a redundant word line in a semiconductor memory array, said circuit including:
- non-volatile memory means capable of assuming a first unprogrammed state and a second programmed state;
addressing means responsive to addressing signals and coupled to said non-volatile memory means for selecting said non-volatile memory means for programming;
programming means adapted to receive programming signals for selectively causing said non-volatile memory means to change from said first to said second state in response to said programming and addressing signals;
semiconductor switching means connected between said redundant word line and said non-volatile memory means and responsive to said addressing signals for determining whether said non-volatile memory means is in said first or said second state and further for disabling said redundant word line in response to said first state and for enabling said redundant word line in response to said second state.
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Abstract
A non-volatile memory cell circuit is used to replace a polysilicon fuse as an enabling element for a redundant row or column of memory cells in a semiconductor memory array. The fuse is divided into read and program sections, allowing a large device to be used for reading and a small device to be used for programming, thus permitting programming of all fuses in a redundant row simultaneously with minimal current consumption. The circuit may be embodied as a five-device or a four-device configuration.
50 Citations
13 Claims
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1. A semiconductor circuit for enabling a redundant word line in a semiconductor memory array, said circuit including:
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non-volatile memory means capable of assuming a first unprogrammed state and a second programmed state; addressing means responsive to addressing signals and coupled to said non-volatile memory means for selecting said non-volatile memory means for programming; programming means adapted to receive programming signals for selectively causing said non-volatile memory means to change from said first to said second state in response to said programming and addressing signals; semiconductor switching means connected between said redundant word line and said non-volatile memory means and responsive to said addressing signals for determining whether said non-volatile memory means is in said first or said second state and further for disabling said redundant word line in response to said first state and for enabling said redundant word line in response to said second state. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A semiconductor circuit for enabling a redundant word line in a semiconductor memory array, said circuit including:
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non-volatile memory means capable of assuming a first unprogrammed state and a second programmed state; programming means coupled to said non-volatile memory means and adapted to receive programming signals for selectively causing said non-volatile memory means to change from said first to said second state in response to said programming signals, said programming means including addressing means responsive to addressing signals for selecting said non-volatile memory means; semiconductor switching means connected between said redundant word line and said non-volatile memory means and responsive to said addressing signals for determining whether said non-volatile memory means is in said first or said second state and further for disabling said redundant word line in response to said first state and for enabling said redundant word line in response to said second state.
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Specification