Simultaneous signal detection for IFM receivers by transient detection

• US 4,547,727 A
• Filed: 07/08/1983
• Issued: 10/15/1985
• Est. Priority Date: 07/08/1983
• Status: Expired due to Fees

• Current Assignee: The United States of America As Represented By The Secretary of Agriculture
• Original Assignee: United States Of America As Represented By The Secretary Of The Air Force
• Inventors: Tsui, James B. Y., Shaw, Rudy L.
• Primary Examiner(s): Strecker, Gerard R.
• Assistant Examiner(s): RAEVIS, ROBERT R
• Application Number:
  US06/512,064
• Time in Patent Office: 830 Days
• Field of Search: 324/79 D, 324/77 H, 455/226, 343/18 E, 343/55 A, 307/525, 307/527, 307/528
• US Class Current: 324/76.47
• CPC Class Codes: G01R 23/00 Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
• CPC Class Codes: G01S 7/021 Auxiliary means for detecting or identifying radar signals or the like, e.g. radar jamming signals

Abstract

The instantaneous frequency measurement (IFM) receiver is highly susceptible to erroneously reporting frequency if two or more signals are overlapped in time. This problem is extremely important when the receiver is presented with synchronized signals. A method is presented to detect simultaneous signals which overlap in the critical frequency encode strobe.

In essence, during the pulse overlap condition, a transient will occur on the video output lines of the receiver. These lines are monitored during the transient period and compared with predetermined values which are obtained from the single signal condition. If a transient is detected, a simultaneous signal detect flag is raised and this flag is sent to an associated processor. In this special design, the receiver will measure the frequency again at approximately 200 ns from the first measurement. The transient detection is also performed on the second measurement.

Claims

1. In an instantaneous frequency measurement (IFM) receiver which has receiving means including a limiter, which in response to simultaneous signals produces heterodyne signals which absorb energy and therefore reduces the output for signals in a filter band, discriminator and detector circuits to provide sine and cosine signals, and logic circuits for processing the sine and consine signals to provide a frequency output in a digital format as a frequency measurement, the improvement comprising:

transient detection means for digital detection of a simultaneous signal condition, comprising two analog-to-digital converters, first and second memories, and comparison means;

said converters having respective inputs coupled one to the sine line and the other to the cosine line of the receiver, and respective outputs providing the sine and cosine signals in digital form;

the converter outputs being coupled to address inputs of the first memory, which by table look up provides a digital output of the square root of the sum of the squares of the sine and cosine signals, and which used as the amplitude of a detector receiver signal;

the second memory having address inputs coupled to a given number of leads of said frequency output, the second memory having stored therein data for each frequency addressed data representing amplitude values at a lower level than the minimum amplitude at that frequency for a single signal condition;

the outputs of the first and second memories being connected to corresponding inputs of the comparison means, the comparison means having an output on which a comparison output signal is at a first level in response to the output of the first memory being less than the output of the second memory and otherwise being at a second level, the presence of simultaneous signals being flagged when the comparison output signal is at the first level.

2. The apparatus according to claim 1, wherein the first and second memories are read only memories, wherein said transient detection means further includes latch means coupled between the analog-to-digital converters and the first memory, and control means including timing means which is responsive to a threshold broken signal from the receiver to initiate operation so that after a predetermined interval an enable signal is supplied to the analog-to-digital converters, after another short interval a latch signal is supplied to the latch means, and after another interval a data ready signal is generated which indicates that the output of the comparison means may be read, the comparison output signal and the data ready signal being supplied to said logic circuits.

3. The apparatus according to claim 2, wherein the control means includes means responsive to said comparison output signal being at the first level to generate a restart signal which is supplied to the receiver to enable it to make a second measurement of the frequency, the restart signal also being supplied to said timing means to initiate a second cycle of operation with an enable signal to the analog-to-digital converters, a latch signal to the latch means, and a data ready signal.

4. The apparatus according to claim 3, wherein the control means includes bistable device means connected to count the cycles of operation and to prevent a third cycle until after the threshold broken signal returns to normal and later reappears.

5. The apparatus according to claim 1, wherein the transient means includes means responsive to said comparison output signal being at the first level to cause the receiver to measure the frequency again after an interval from the first measurement, and to also perform the transient detection on the second measurement.