Filter display system

• US 4,551,816 A
• Filed: 09/27/1982
• Issued: 11/05/1985
• Est. Priority Date: 12/28/1970
• Status: Expired due to Term

• Current Assignee: Gilbert P. Hyatt
• Original Assignee: Gilbert P. Hyatt
• Inventors: Hyatt, Gilbert P.
• Primary Examiner(s): Gruber, Felix D.
• Application Number:
  US06/425,135
• Time in Patent Office: 1,135 Days
• Field of Search: 369/724, 369/725, 369/728, 369/200, 369/900, 369/521
• US Class Current: 708/422
• CPC Class Codes: B60R 16/0373 Voice control in general G10L
• CPC Class Codes: F21V 23/00 Arrangement of electric circuit elements in or on lighting devices characterised by cooling arrangements F21V29/508
• CPC Class Codes: G01S 15/897 using application of holographic techniques
• CPC Class Codes: G01S 15/8977 using special techniques for image reconstruction, e.g. FFT, geometrical transformations, spatial deconvolution, time deconvolution
• CPC Class Codes: G01S 7/52026 Extracting wanted echo signals Doppler systems G01S15/50; Doppler short range imaging systems G01S15/8979
• CPC Class Codes: G02F 1/0121 Operation of devices; Circuit arrangements, not otherwise provided for in this subclass
• CPC Class Codes: G02F 1/13318 Circuits comprising a photodetector
• CPC Class Codes: G03F 9/7049 Technique, e.g. interferometric
• CPC Class Codes: G03F 9/7088 Alignment mark detection, e.g. TTR, TTL, off-axis detection, array detector, video detection
• CPC Class Codes: G04G 99/006 Electronic time-pieces using a microcomputer, e.g. for multi-function clocks
• CPC Class Codes: G05B 19/351 the positional error is used to control continuously the servomotor according to its magnitude
• CPC Class Codes: G05B 19/408 characterised by data handling or data format, e.g. reading, buffering or conversion of data
• CPC Class Codes: G05B 19/4083 Adapting programme, configuration
• CPC Class Codes: G05B 19/4086 Coordinate conversions; Other special calculations
• CPC Class Codes: G05B 19/409 characterised by using manual data input [MDI] or by using control panel, e.g. controlling functions with the panel; characterised by control panel details or by setting parameters G05B19/408, G05B19/4093 take precedence
• CPC Class Codes: G05B 19/4093 characterised by part programming, e.g. entry of geometrical information as taken from a technical drawing, combining this with machining and material information to obtain control information, named part programme, for the NC machine
• CPC Class Codes: G05B 19/414 Structure of the control system, e.g. common controller or multiprocessor systems, interface to servo, programmable interface controller
• CPC Class Codes: G05B 19/4142 characterised by the use of a microprocessor G05B19/4141 takes precedence
• CPC Class Codes: G05B 2219/23094 Debounce key
• CPC Class Codes: G05B 2219/33182 Uart, serial datatransmission, modem
• CPC Class Codes: G05B 2219/34023 : Risc processor
• CPC Class Codes: G05B 2219/34098 : Slope fitting, fairing contour, curve fitting, transition
• CPC Class Codes: G05B 2219/34471 : Program memory is inhibited, not accessible as long as power fails
• CPC Class Codes: G05B 2219/34472 : Configure alterable memory as read only, to avoid erasing
• CPC Class Codes: G05B 2219/35262 : Macro instruction, canned cycles, subroutines, subprogram
• CPC Class Codes: G05B 2219/35263 : Using variables, parameters in program, macro, parametrized instruction
• CPC Class Codes: G05B 2219/35373 : Data storage, buffer
• CPC Class Codes: G05B 2219/35381 : Convert in real time input peripheral data to processor data, ouput data format
• CPC Class Codes: G05B 2219/35431 : Interactive
• CPC Class Codes: G05B 2219/35436 : Means, manual input, input reference, hand wheel
• CPC Class Codes: G05B 2219/35453 : Voice announcement, oral, speech input
• CPC Class Codes: G05B 2219/35472 : Mode selection
• CPC Class Codes: G05B 2219/35554 : Mirror, other conversions
• CPC Class Codes: G05B 2219/35588 : Pack, compress data efficiently in memory
• CPC Class Codes: G05B 2219/36152 : Panel
• CPC Class Codes: G05B 2219/36227 : Assist operator to calculate unknown points, contours
• CPC Class Codes: G05B 2219/36333 : Selection from standard forms, shapes, partprograms, enter value for variable
• CPC Class Codes: G05B 2219/36366 : Data, read in, distribution
• CPC Class Codes: G05B 2219/36379 : Read in
• CPC Class Codes: G05B 2219/36395 : Load local computer program from host, data transfer ram to rom, BTR
• CPC Class Codes: G05B 2219/36502 : Ram for variable servo data, rom for fixed servo routine
• CPC Class Codes: G05B 2219/36503 : Adapt program to real coordinates, software orientation
• CPC Class Codes: G05B 2219/36506 : Store in Rom and Ram
• CPC Class Codes: G05B 2219/36546 : Memory protection, protected fields
• CPC Class Codes: G05B 2219/41021 : Variable gain
• CPC Class Codes: G05B 2219/42237 : Pwm pulse width modulation, pulse to position modulation ppm
• CPC Class Codes: G05B 2219/45214 : Gear cutting
• CPC Class Codes: G05B 2219/45215 : Thread cutting
• CPC Class Codes: G05B 2219/49221 : Control of scale
• CPC Class Codes: G05B 2219/50047 : Positioning, indexing
• CPC Class Codes: G05B 2219/50048 : Jogging
• CPC Class Codes: G05B 2219/50083 : Power loss, measures again loss of power
• CPC Class Codes: G05B 2219/50151 : Orient, translate, align workpiece to fit position assumed in program
• CPC Class Codes: G06F 13/12 : using hardware independent of the central processor, e.g. channel or peripheral processor
• CPC Class Codes: G06F 13/16 : for access to memory bus G06F13/28 takes precedence
• CPC Class Codes: G06J 1/00 : Hybrid computing arrangements digitally-programmed analogue computers G06G7/06
• CPC Class Codes: G07G 1/12 : electronically operated digital data processing aspects G06Q20/00
• CPC Class Codes: G10L 19/00 : Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis in musical instruments G10H
• CPC Class Codes: G11C 11/565 : using capacitive charge storage elements
• CPC Class Codes: G11C 13/0033 : Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 13/04 : using optical elements ; using other beam accessed elements, e.g. electron or ion beam
• CPC Class Codes: G11C 16/3418 : Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3431 : Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 19/287 : Organisation of a multiplicity of shift registers
• CPC Class Codes: G11C 19/36 : using multistable semiconductor elements
• CPC Class Codes: G11C 27/00 : Electric analogue stores, e.g. for storing instantaneous values
• CPC Class Codes: G11C 27/04 : Shift registers
• CPC Class Codes: G11C 7/1039 : using pipelining techniques, i.e. using latches between functional memory parts, e.g. row/column decoders, I/O buffers, sense amplifiers
• CPC Class Codes: G11C 7/16 : Storage of analogue signals in digital stores using an arrangement comprising analogue/digital [A/D] converters, digital memories and digital/analogue [D/A] converters
• CPC Class Codes: H03H 17/0291 : Digital and sampled data filters
• CPC Class Codes: Y02P 90/02 : Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

Abstract

A filter display system is provided for displaying filtered information. Input signals are multiplied by reference signals and summed to generate filtered signals for display. In an on the fly processing configuration, an input signal sample is processed in response to a plurality of reference samples before processing of other input signal samples. Various memory configurations are used to store signal samples; including RAMs, ROMs, and CCD memories. Processing is performed with various resolutions, including single-bit sample processing and multi-bit sample processing. Processing gain is used to provide processed signal samples having resolution better than the resolution of input signal samples. A display is provided that iteratively improves the displayed information as the filtering progresses. A pipeline configuration uses hardware for progressive processing of signal samples. An iterative configuration is implemented with a computer processing signal samples in iterative form. A hardware configuration uses address counters to process samples. Processing in response to a display synchronization signal provides synchronization between a processor and a display.

Claims

1. A display system comprising:

input means for generating a plurality of digital input signal samples;

a filter processor for generating filtered signal samples in response to the input signal samples from said input means, said filter processor including;

a. receiving means for receiving the input signal samples from said input means,

b. reference means for storing reference signal samples,

c. multiplying means for generating product signal samples by multiplying input signal samples received with said receiving means by reference signal samples stored in said reference means, and

d. summing means for generating the filtered signal samples by summing product signal samples generated with said multiplying means;

memory means for storing the filtered signal samples generated with said summing means; and

a display for displaying filtered information to an operator in response to the filtered signal samples stored in said memory means.

2. The system as set forth in claim 1 above, wherein said summing means includes means for generating the filtered signal samples stored in said memory means at the same time that the filtered signal samples stored in said memory means are being displayed to an operator with said display.

3. The system as set forth in claim 1 above, wherein said summing means includes means for generating the filtered signal samples by summing product signal samples generated with said multiplying means with filtered signal samples stored in said memory means to cause the filtered signal samples stored in said memory means to increase in signal to noise ratio;

wherein said display includes means for displaying filtered information to an operator that is increasing in signal to noise ratio as the display is displaying the stored filtered signal samples.

13. The system as set forth in claim 1 above, wherein said display system is a medical display system for displaying the information as filtered medical information.

14. The system as set forth in claims 1 above, wherein said display system is a pattern recognition display system for displaying the informatioon as filtered pattern recognition information.

15. The system as set forth in claim 1 above, wherein said display system is an image processing display system for displaying the information as processed image information.

4. A display system comprising:

a CRT display for displaying correlation filtered information to an operator in response to correlation filtered signal samples and

a correlation filter processor for generating correlation filtered signal samples to the CRT display for displaying the correlation filtered information to an operator, said correlation filter processor including;

a. input means for receiving input signal samples,

b. reference means for storing reference signal samples,

c. multiplying means for generating product signal samples by multiplying input signal samples received with said input means and reference signal samples stored with said reference means, and

d. summing means for generating the correlation filtered signal samples to said CRT display by summing product signal samples generated with said multiplying means.

7. The system as set forth in either of claims 4, 5, or 6 above;

wherein said filter processor includes means for fully processing an input signal sample prior to processing the next input signal sample with said multiplying means and summing means.

8. The system as set forth in claim 4 above, wherein said correlation filter processor includes a spacial domain correlation filter processor for generating the correlation filtered signal samples to the CRT display as spacial correlation filtered signal samples for displaying the correlation filtered information as spacial correlation filtered information to an operator, wherein said input means includes means for receiving the input signal samples as input spacial signal samples, wherein said reference means includes means for storing the reference signal samples as spacial reference signal samples, wherein said multiplying means includes means for generating the product signal samples as spacial product signal samples by multiplying the input spacial signal samples and the spacial reference signal samples, wherein said summing means includes means for generating the correlatioon filtered signal samples to said CRT display as spacial correlation filtered signal samples by summing spacial product signal samples generated with said multiplying means, and wherein said CRT display includes means for displaying the correlation filtered information to an operator as spacial correlation filtered information in response to the spacial correlation filtered signal samples generated with said summing means.

9. The system as set forth in claim 4 above, wherein said correlation filter processor includes a temporal correlation filter processor for generating the correlation filtered signal samples to the CRT display as temporal correlation filtered signal samples for displaying the correlation filtered information as temporal correlation filtered information to an operator, wherein said input means includes means for receiving the input signal samples as input temporal signal samples, wherein said reference means includes means for storing the reference signal samples as temporal reference signal samples, wherein said multiplying means includes means for generating the product signal samples as temporal product signal samples by multiplying the inpout temporal signal samples and the temporal reference signal samples, wherein said summing means includes means for generating the correlation filtered signal samples to said CRT display as temporal correlation filtered signal samples by summing temporal product signal samples generated with said multiplying means, and wherein said CRT display includes means for displaying the correlation filtered information to an operator as temporal correlation filtered information in response to the temporal correlation filtered signal samples generated with said summing means.

10. The system as set forth in claims 4, 8, or 9 above, further comprising:

means for generating input signal samples and

a FIFO for storing the input signal samples generated with said input signal sample generating means in first in first out form, said FIFO including FIFO input means for storing the input signal samples generated with said input signal sample generating means and FIFO output means for outputting the input signal samples stored in said FIFO to said input means in a first in first out form, wherein said input means includes means for receiving the input signal samples provided with said FIFO output means.

11. The system as set forth in claims 4, 8, 9, or 10 above, wherein said correlation filter processor includes a resolution enhancing correlation filter processor for generating higher resolution correlation filtered signal samples to the CRT display for displaying the correlation filtered information as enhanced resolution correlation filtered information to an operator, wherein said input means includes means for receiving the input signal samples as lower resolution input signal samples, wherein said multiplying means includes means for generating the product signal samples as higher resolution product signal samples by multiplying the lower resolution input signal samples and the reference signal samples, wherein said summing means includes means for generating the correlation filtered signal samples to said CRT display as higher resolution correlation filtered signal samples by summing product signal samples generated with said multiplying means, and wherein said CRT display includes means for displaying the correlation filtered information to an operator as higher resolution correlation filtered information in response to the higher resolution correlation filtered signal samples from said summing means.

12. The system as set forth in claim 4 above, further comprising a first in first out memory for storing FIFO samples and means for generating the input signal samples to said filter processor in response to the FIFO samples stored in said first in first out memory. The information as processed image information.

5. A display system comprising:

a digital filter processor for generating filtered display signal samples, said filter processor including;

a. input means for receiving input signal samples,

b. reference means for storing reference signal samples, and

c. processing means for processing the input signal samples on the fly with the reference signal samples to generate the filtered display signal samples; and

a display for displaying filtered information to an operator in response to the filtered display signal samples generated with said processing means.

6. A display system comprising:

a digital filter processor for generating filtered display signal samples, said filter processor including;

a. input means for receiving input signal samples,

b. reference means for storing reference signal samples, and

c. multiplying means for generating a plurality of product signal samples by multiplying each of the input signal samples by a plurality of reference signal samples before multiplying a next input signal sample by the reference signal samples, and

d. summing means for generating each of a plurality of filtered display signal samples by summing a plurality of the product signal samples; and

a display for displaying filtered information to an operator in response to the filtered display signal samples generated with said summing means.

16. A display system comprising:

memory means for storing display signal samples;

accessing means for accessing display signal samples from said memory means;

a filter processor for generating filtered display signal samples in response to the display signal samples accessed from said memory means, said filter processor including;

a. receiving means for receiving the display signal samples accessed from said memory means with said accessing means,

b. reference means for generating reference signal samples,

c. multiplying means for generating product signal samples by multiplying display signal samples received with said receiving means by reference signal samples generated with said reference means, and

d. summing means for generating filtered display signal samples by summing product signal samples generated with said multiplying means;

means for refreshing a display with the filtered display signal samples generated with said summing means; and

a display for displaying filtered information to an operator in respose to refreshing with the filtered display signal samples by said refreshing means.

17. A display system comprising:

memory means for storing filtered signal samples generated with a filter processor;

a display for displaying filtered information to an operator in response to the filtered signal samples stored in said memory means;

input means for generating a plurality of digital input signal samples; and

a filter processor for generating filtered signal samples in response to the input signal samples from said input means, said filter processor including;

a. receiving means for receiving the input signal samples from said input means,

b. reference means for generating reference signal samples,

c. multiplying means for generating product signal samples by multiplying input signal samples received with said receiving means by reference signal samples generated with said reference means,

d. summing means for generating the filtered signal samples by summing product signal samples generated with said multiplying means with filtered signal samples stored in said memory means, and

e. means for storing the filtered signal samples generated with said summing means into said memory means to display filtered signal samples while the generation of the filtered signal samples is being performed with said summing means.

18. A display system comprising:

memory means for storing a plurality of signal samples to be displayed;

synchronization means for generating a synchronization signal related to start of a display operation;

address means for generating a sequence of addresses in response to the synchronization signal generated with said synchronization means;

means for sequentially accessing a plurality of signal samples stored in said memory means under control of the sequence of addresses generated with said address means;

a filter processor for generating filtered signal samples in response to the stored signal samples accessed from said memory means under control of said sequentially accessing means, said filter processor including

a. receiving means for generating input signal samples in response to the stored signal samples accessed from said memory means under control of said sequentially accessing means,

b. reference means for generating reference signal samples,

c. multiplying means for generating product signal samples by multiplying input signal samples generated with said receiving means by reference signal samples generated with said reference means, and

d. summing means for generating filtered signal samples by summing product signal samples generated with said multiplying means; and

a display for displaying filtered information to an operator in response to the filtered signal samples generated with said summing means.

19. A display system comprising:

memory means for storing filtered signal samples;

a display for displaying filtered information to an operator in response to the filtered signal samples stored in said memory means; and

a filter processor for building up magnitude of filtered signal samples stored is said memory means as the filtered signal samples stored is said memory means are successively displayed to an operator with said display, said filter processor including;

a. input means for receiving input signal samples,

b. reference means for storing reference signal samples,

c. multiplying means for generating product signal samples by multiplying the input signal samples and the reference signal samples, and

d. summing means for building up magnitude of the filtered signal samples stored in said memory means by summing the product signal samples generated with said multiplying means with the filtered signal samples stored in said memory means to build up the magnitude of the filtered signal samples stored in said memory means.

20. A display system comprising:

a first in first out memory for storing a plurality of FIFO signal samples;

input means for generating a sequence of input signal samples in response to the FIFO signal samples stored in said first in first out memory;

a filter processor for generating filtered signal samples in response to the input signal samples from said input means, said filter processor including;

a. receiving means for receiving the input signal samples from said input means,

b. reference means for storing reference signal samples,

c. multiplying means for generating product signal samples by multiplying input signal samples received with said receiving means by reference signal samples stored in said reference means, and

d. summing means for generating the filtered signal samples by summing product signal samples generated with said multiplying means;

display means for displaying filtered information to an operator in response to the filtered signal samples generated with said summing means.

21. A display system comprising:

a digital filter processor for generating filtered display signal samples, said filter processor including;

a. input means for receiving input signal samples,

b. reference means for generating reference signal samples, and

c. multiplying means for generating the filtered display signal samples by multiplying a plurality of reference signal samples by a single input signal sample before multiplying a reference signal sample by a next input signal sample; and

a display for displaying filtered information to an operator in response to the filtered display signal samples generated with said multiplying means.

22. A display system comprising:

a refresh memory for storing display signal samples;

accessing means for accessing display signal samples from said refresh memory;

a filter processor for generating filtered display signal samples in response to the display signal samples accessed from said refresh memory with said accessing means, said filter processor including;

a. receiving means for generating input signal samples in response to the display signal samples accessed from said refresh memory with said accessing means,

b. reference means for generating reference signal samples,

c. multiplying means for generating product signal samples by multiplying input signal samples generated with said receiving means by reference signal samples generated with said reference means,

d. summing means for generating updated display signal samples by summing product signal samples generated with said multiplying means, and

e. means for storing updated display signal samples generated with said summing means into said refresh memory; and

a display for displaying filtered information to an operator in response to the display signal samples stored in said refresh memory.

23. A display system comprising:

input means for generating input signal samples;

a filter processor for generating filtered signal samples in response to input signal samples generated with said input means, said filter processor including;

a. receiving means for receiving input signal samples generated with said input means,

b. reference means for generating reference signal samples, and

c. multiplying means for generating product signal samples by multiplying the input signal samples received with said receiving means and the reference signal samples generated with said reference means;

a refresh memory for storing filtered signal samples;

updating means for updating the filtered signal samples stored in said refresh memory in response to the product signal samples generated with said multiplying means;

refreshing means for generating filtered display signal samples to refresh a display in response to the filtered signal samples stored in said refresh memory; and

a display for displaying filtered information to an operator in response to the filtered display signal samples generated with said refreshing means.

24. A display system comprising:

input means for generating a plurality of input signal samples;

reference means for storing a plurality of reference signal samples;

multiplying means for generating a plurality of product signal samples by multiplying each of said input signal samples by a plurality of different reference signal samples;

summing means for generating filtered display signal samples by summing product signal samples; and

a display for displaying a filtered image in response to the filtered display signal samples.

25. The system as set forth in claim 24 above, wherein said system includes a plurality of digital filter processor channels for processing a plurality of channels of input signal samples on the fly.

26. The system as set forth in claim 24 above;

wherein said multiplying means includes means for generating the product signal samples by multiplying each of the input signal samples by a plurality of different reference signal samples before multiplying a next input signal sample by the reference signal samples and wherein said system includes means for fully processing an input signal sample prior to processing the next input signal sample with said multiplying means and summing means.

27. The system as set forth in claim 24 above, wherein said multiplying means includes means for multiplying a plurality of reference signal samples by a single input signal sample to generate a plurality of product signal samples before multiplying a reference signal sample by a next input signal sample.

28. The system as set forth in claim 24 above, wherein summing means includes refresh means for refreshing said display with the filtered display signal samples to cause the displayed filtered image to increase in signal to noise ratio as the display is refreshed with the filtered display signal samples.

29. The system as set forth in claim 24 above, further comprising a refresh memory for storing the filtered display signal samples generated with said summing means, means for accessing a stored filtered display signal sample from said refresh memory, means for updating the filtered display signal sample accessed from said refresh memory with said summing means, means for displaying the filtered display signal sample updated with update means, and means for storing the filtered display signal sample updated with said update means into said refresh memory.

30. A display system comprising:

input means for generating input signal samples;

synchronization means for generating a synchronization signal for synchronizing a CRT display;

a stored program digital computer for iteratively processinng display information in response to the synchronization signal generated with said synchronization means under control of a stored program, said computer including

1. a main memory for storing the program,

2. processing means for iteratively processing the display information in response to the synchronization signal under control of the program stored in said main memory, and

3. output means for iteratively generating output display information in response to the iterative processing with said processing means;

a filter processor for generating filtered signal samples in response to the input signal samples from said input means in response to the display information output from said output means, said filter processor including;

a. receiving means for receiving the input signal samples from said input means,

b. reference means for generating reference signal samples,

c. multiplying means for generating product signal samples by multiplying input signal samples received with said receiving means by reference signal samples generated with said reference means, and

d. summing means for generating the filtered signal samples by summing product signal samples generated with said multiplying means; and

a CRT display for displaying a filtered image in response to the filtered signal samples generated with said summing means under control of the synchronization signal from said synchronization means.

31. A display system comprising:

input means for generating a plurality of input signal samples;

reference means for storing a plurality of reference signal samples;

multiplying means for generating a plurality of product signal samples by multiplying each of the input signal samples by a plurality of reference signal samples before multiplying a next input signal sample by the reference signal samples;

summing means for generating filtered display signal samples by summing product signal samples generated with said multiplying means; and

a display for displaying a filtered image in response to the filtered display signal samples generated with said summing means.

32. A display system comprising:

input means for generating a plurality of input signal samples;

reference means for generating a plurality of reference signal samples;

multiplying means for generating a plurality of product signal samples by multiplying each of said input signal samples generated with said input means by a plurality of reference signal samples generated with said reference means;

summing means for generating filtered signal samples by summing product signal samples generated with said multiplying means;

an update address generator for generating update addresses;

a memory for storing the filtered signal samples generated with said summing means in response to the update addresses generated with said update address generator;

a refresh address generator for generating refresh addresses;

refreshing means for generating filtered display signal samples in response to the filtered signal samples stored in said memory under control of the refresh addresses generated with said refresh address generator; and

a display for displaying a filtered image in response to the filtered display signal samples generated with said refreshing means.

33. A display system comprising:

input means for generating a plurality of input signal samples;

reference means for generating a plurality of reference signal samples;

multiplying means for generating a plurality of product signal samples by multiplying each of said input signal samples generated with said input means by a plurality of reference signal samples generated with said reference means;

a refresh memory for storing filtered display signal samples;

means for refreshing a display with the filtered display signal samples stored in said refresh memory;

a display for displaying a filtered image in response to the filtered display signal samples stored in said refresh memory under control of the refreshing means; and

summing means for updating the filtered display signal samples stored in said refresh memory by summing the product signal samples generated with said multiplying means with the filtered display signal samples stored in said refresh memory to display the filtered display signal samples while updating of the filtered display signal samples is being performed.

34. A display system comprising:

input means for generating a plurality of input signal samples;

reference means for generating a plurality of reference signal samples;

multiplying means for generating a plurality of product signal samples by multiplying each of said input signal samples generated with said input means by a plurality of reference signal samples generated with said reference means;

summing means for generating filtered display signal samples by summing product signal samples generated with said multiplying means;

a refresh memory for storing filtered display signal samples generated with said summing means;

means for refreshing a display with the filtered display signal samples stored in said refresh memory;

a display for displaying a filtered image in response to the filtered display signal samples stored in said refresh memory under control of said refreshing means; and

means for updating the filtered display signal samples stored in said refresh memory at the same time that the filtered display signal samples stored in said refresh memory are being displayed to an operator with said display under control of said refreshing means.

35. A display system comprising:

memory means for storing a plurality of memory signal samples;

reference means for storing a plurality of reference signal samples;

multiplying means for generating a plurality of product signal samples by multiplying memory signal samples stored in said memory means by reference signal samples stored in said reference means;

summing means for generating summed signal samples by summing product signal samples generated with said multiplying means;

a display for displaying a filtered image in response to the summed signal samples generated with said summing means.

36. A display system comprising:

input means for generating a plurality of input signal samples;

reference means for generating a plurality of reference signal samples;

multiplying means for generating a plurality of product signal samples by multiplying each of the input signal samples generated with said input means by a plurality of reference signal samples generated with said reference means;

a memory for storing filtered display signal samples;

summing means for building up magnitude of filtered display signal samples stored in said memory by summing product signal samples generated with said multiplying means with filtered display signal samples stored in said memory; and

means for repetitively accessing the filtered display signals stored in said memory as the filtered display signal samples are built up in magnitude with said summing means;

a display for repetitively displaying a filtered image in response to the filtered display signal samples that are repetitively accessed from said memory with said repetitively accessing means as the filtered display signal samples are built up in magnitude with said summing means.

37. A display system comprising:

input means for generating a plurality of lower resolution digital input signal samples;

a filter processor for generating higher resolution signal samples in response to the lower resolution input signal samples from said input means, said filter processor including;

a. receiving means for receiving the lower resolution input signal samples from said input means,

b. reference means for generating reference signal samples,

c. multiplying means for generating product signal samples by multiplying lower resolution input signal samples received with said receiving means by reference signal samples generated with said reference means, and

d. summing means for generating the higher resolution signal samples by summing product signal samples generated with said multiplying means; and

display means for displaying a higher resolution filtered image to an operator in response to the higher resolution signal samples generated with said summing means.

38. A display system comprising:

a digital processor for generating an update signal;

a refresh memory for storing display information;

update means for selectively updating the display information stored in said refresh memory in response to the update signal from said digital processor;

refresh means for refreshing a display with the display information stored in said refresh memory; and

a display for displaying information to an operator in response to refreshing with said refresh means.

39. The system as set forth in claim 38 above, wherein said digital processor is a digital filter processor, said digital filter processor including

a. input means for receiving input signal samples,

b. reference means for storing reference signal samples,

c. multiplying means for generating product signal samples by multiplying the input signal samples and the reference signal samples,

d. summing means for generating the update signal by summing the product signal samples with the stored display information, and

e. means for generating the display information as composited display information by compositing the update signal.

40. A display system comprising:

a digital filter processor for generating a display update signal, said digital filter processor including

a. input means for receiving input signal samples,

b. reference means for storing reference signal samples,

c. multiplying means for generating product signal samples by multiplying the input signal samples and the reference signal samples, and

d. summing means for generating the display update signal by summing at least two of the product signal samples generated with said multiplying means;

a refresh memory for storing display information;

update means for updating the display information stored in said refresh memory in response to the update signal from said digital processor;

refresh means for refreshing a display with the display information stored in said refresh memory; and

a display for displaying information to an operator in response to refreshing with said refresh means.

41. The system as set forth in claim 40 above, wherein said filter processor includes means for fully processing an input signal sample prior to processing the next input signal sample with said multiplying means and summing means.

42. A display system comprising:

a digital correlation filter processor for generating a correlation update signal, said digital correlation filter processor including

a. input means for receiving input signal samples,

b. reference means for storing reference signal samples,

c. multiplying means for generating product signal samples by multiplying the input signal samples and the reference signal samples, and

d. summing means for generating the update signal by summing product samples;

a refresh memory for storing display information;

update means for updating the display information stored in said refresh memory in response to the update signal from said digital correlation filter processor;

refresh means for refreshing a display with the display information stored in said refresh memory; and

a display for displaying information to an operator in response to refreshing with said refresh means.

43. A display system comprising:

a digital correlation filter processor for generating a correlation filter update signal;

a refresh memory for storing correlation information, wherein said correlation information includes a plurality of digital correlation signal samples;

update means for updating the correlation information stored in said refresh memory in response to the correlation filter update signal from said digital correlation filter processor;

refresh means for refreshing a display with the correlation information stored in said refresh memory; and

a CRT display for displaying information to an operator in response to refreshing with said refresh means.

44. A display system comprising:

a digital filter processor for generating an update signal, said digital filter processor including

a. input means for receiving input signal samples,

b. reference means for storing reference signal samples,

c. multiplying means for generating product signal samples by multiplying each of the input signal samples by a plurality of reference signal samples before multiplying a next input signal sample by the reference signal samples, and

d. summing means for generating the update signal by summing at least two product signal samples with the stored display information;

a refresh memory for storing display information;

update means for updating the display information stored in said refresh memory in response to the update signal from said digital processor;

refresh means for refreshing a display with the display information stored in said refresh memory; and

a display for displaying information to an operator in response to refreshing with said refresh means.

45. A display system comprising:

synchronization means for generating a real time synchronization signal for synchronizing a display in real time;

input means for generating a plurality of digital input signal samples;

a digital filter processor for iteratively processing the input signal samples generated with said input means to generate filtered signal samples in real time under control of the synchronization signal generated with said synchronization means, said digital filter processor including

a. receiving means for receiving the input signal samples from said input means under control of the synchronization signal generated with said synchronization means,

b. reference means for generating reference signal samples,

c. multiplying means for generating product signal samples by multiplying the input signal samples received with said receiving means and the reference signal samples generated with said reference means, and

d. summing means for generating the filtered signal samples by summing product signal samples generated with said multiplying means; and

a display for displaying filtered information to an operator in response to the filtered signal samples generated with said summing means under control of the synchronization signal generated with said synchronization means.

46. A display system comprising:

a digital processor for generating an update signal;

a refresh memory for storing display information;

update means for updating the display information stored in said refresh memory in response to the update signal from said digital processor at the same time that the display information stored in said refresh memory is being displayed to an operator with a display;

refresh means for refreshing a display with the display information stored in said refresh memory; and

a display for displaying information to an operator in response to refreshing with the display information stored in said refresh memory under control of said refresh means.

47. A display system comprising:

a digital processor for generating an update signal;

a refresh memory for storing display information;

update means for successively building up magnitude of the display information stored in said refresh memory in response to the update signal from said digital processor;

refresh means for successively refreshing a display with display information stored in said refresh memory to successively display the display information to an operator as the magnitude of the display information is being built up with said update means; and

a display for displaying information to an operator in response to refreshing with display information stored in said refresh memory under control of said refresh means.

48. A display system comprising:

a digital processor for generating an update signal;

a refresh memory for storing display information;

update means for updating the display information stored in said refresh memory in response to the update signal from said digital processor;

refresh means for refreshing a display with display information stored in said refresh memory simultaneously with updating of the display information stored in said refresh memory with said update means; and

a display for displaying information to an operator in response to refreshing with display information stored in said refresh memory with said refresh means.

49. A display system comprising:

a refresh memory for storing display signal samples;

a digital filter processor including

a. input means for receiving input signal samples,

b. reference means for storing reference signal samples,

c. multiplying means for multiplying a plurality of reference signal samples stored in said reference means by a single input signal sample received with said input means to generate a plurality of product signal samples before multiplying a reference signal sample by a next input signal sample, and

d. summing means for updating the display signal samples stored in said refresh memory by summing the product samples generated with said multiplying means with the display signal samples stored in said refresh memory;

refresh means for refreshing a display with the display signal samples stored in said refresh memory; and

a display for displaying information to an operator in response to refreshing with said refresh means.

50. A display system comprising:

a digital processor for generating an update signal;

a refresh memory for storing display information;

update means for updating the display information stored in said refresh memory in response to the update signal generated with said digital processor to cause the display information stored in said refresh memory to increase in signal to noise ratio;

refresh means for refreshing a display with the display information stored in said refresh memory; and

a display for displaying information to an operator in response to refreshing with said refresh means to cause the information displayed with said display to increase in signal to noise ratio as the display is refreshed with the display information.

51. A display system comprising:

a digital processor for generating an update signal;

a refresh memory for storing display information;

means for accessing display information stored in said refresh memory;

update means for updating the display information stored in said refresh memory in response to the update signal generated with said digital processor; and

display means for displaying the display information updated with said update means and accessed with said accessing means to an operator.