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Memory utilization control system for compressed digital picture data transmission system

  • US 4,554,597 A
  • Filed: 11/03/1983
  • Issued: 11/19/1985
  • Est. Priority Date: 11/05/1982
  • Status: Expired due to Fees
First Claim
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1. A write-in and read-out control apparatus for controlling write-in and read-out of picture element data with respect to a memory circuit, said memory circuit having a memory capacity capable of storing picture element data amounting to one frame and being selectively supplied with picture element data of frame-transmission and picture element data of field-transmission, said frame-transmission being a transmission of all picture element data which are related to a displaying area within a total display area of one picture, said picture element data of frame-transmission amounting to one frame or less according to the size of said displaying area with respect to said total display area, said field-transmission being a transmission of half of the picture element data which are related to the displaying area within the total display area of said one picture, said picture element data of field-transmission amounting to one field or less according to the size of said displaying area with respect to said total display area, said write-in and read-out control apparatus comprising:

  • input terminal means successively applied with input picture element data, said input terminal means being coupled to said memory circuit;

    an address signal generating means for generating an address signal which successively indicates write-in addresses in a first memory region corresponding to one field within said memory circuit into which picture element data which are to be reproduced in a first field among said input picture element data are written, and generating an address signal which successively indicates write-in addresses in a second memory region corresponding to one field within said memory circuit into which picture element data which are to be reproduced in a second field are written, when said picture element data of frame-transmission are successively applied to said input terminal means as said input picture element data, and for generating two address signals which respectively and successively indicate write-in addresses in the first and second memory regions into which said picture element data of field-transmission are written, when said picture element data of field-transmission are successively applied to said input terminal means as said input picture element data;

    write-in pulse generating means for generating at least one write-in pulse when said picture element data of frame-transmission are successively applied to said input terminal means every time one of said input picture element data is applied to said input terminal means, to supply the generated write-in pulse to said memory circuit and write said input picture element data into said memory circuit, and for generating one or two write-in pulses when said picture element data of field-transmission are successively applied to said input terminal means every time one of said input picture element data is applied to said input terminal means, to supply the generated write-in pulse or pulses to said memory circuit and write said input picture element data into said memory circuit; and

    read-out control means for generating a read-out address signal and supplying the generated read-out address signal to said memory circuit, said read-out address indicating an address which is incremented by a predetermined integer regardless of whether stored picture element data in said memory circuit are picture element data of frame-transmission or field-transmission, so that the stored picture element data are read out from said first memory region during a reproducing period of the first field and so that the stored picture element data are read out from said second memory region during a reproducing period of the second field.

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