Gain amplifier

• US 4,555,668 A
• Filed: 10/14/1983
• Issued: 11/26/1985
• Est. Priority Date: 10/14/1983
• Status: Expired due to Term

• Current Assignee: ON Semiconductor Corporation
• Original Assignee: American Microsystems Limited Incorporated (ON Semiconductor Corporation)
• Inventors: Gregorian, Roubik, Fotouhi, Bahram
• Primary Examiner(s): Mullins, James B.
• Application Number:
  US06/542,228
• Time in Patent Office: 774 Days
• Field of Search: 330/9, 330/51, 330/107, 333/173, 307/520
• US Class Current: 330/9
• CPC Class Codes: H03F 1/303 using a switching device H03F1/305, H03F3/005, H03F3/38 take precedence
• CPC Class Codes: H03G 1/04 Modifications of control circuit to reduce distortion caused by control modifications to reduce influence of variations of internal impedance of amplifying elements caused by control H03F1/08

Abstract

A novel switched capacitor gain stage uses a unique circuit design and clocking technique that reduces the component mismatch offset voltage and the clock-induced feedthrough offset voltage produced by the circuit. The total capacitance ratio between the input capacitors and the feedback capacitor necessary to achieve a desired total gain is also minimized.

Claims

1. A gain amplifier comprising at least a first gain stage having a first gain factor and a second gain stage having a second gain factor, wherein each said gain stage comprises:

an input lead for receiving an input signal to be amplified;

an operational amplifier having an inverting input lead, a noninverting input lead connected to a reference voltage, and an output lead;

a feedback capacitor having a first plate connected to said inverting input lead and a second plate connected to said output lead of said operational amplifier;

input capacitor means connected between said input lead and said inverting input lead of said operational amplifier;

a first feedback initialization switch means connected between said inverting input lead and said output lead of said operational amplifier,

and wherein said second gain stage further comprises;

a second feedback initialization switch means connected between said inverting input lead and said output lead of said operational amplifier, said second feedback initialization switch means being closed during a period of time when said first feedback initialization switch means is closed, said second feedback initialization switch means remaining closed for a period of time after said first feedback initialization switch means opens, said second feedback initialization switch means opening after said period of time;

a third switch means connected between said second plate of said feedback capacitor and said output lead of said operational amplifier; and

a fourth switch means connected between said second plate of said feedback capacitor and said reference voltage, wherein said output lead of said operational amplifier of said first gain stage is connected to said input lead of said second gain stage.

2. The structure as in claim 1 wherein said input capacitor means comprises:

a plurality of N capacitors, each having a first plate connected in common to said inverting input lead of said operational amplifier, and a second plate;

a first plurality of N-1 switch means, each connected between said second plate of an associated one of N-1 of said N capacitors and said input lead;

a second plurality of N-1 switch means, each connected between said second plate of an associated one of N-1 of said N capacitors and said reference voltage.

3. The structure as in claim 2 wherein each said input capacitor means comprise an additional switch means connected between said second plate of said Nth capacitor and said input lead, and an additional switch means connected between said second plate of said Nth capacitor and said reference voltage.

4. A gain amplifier comprising at least a first and a second gain stage, wherein each said gain stage comprises:

an input lead for receiving an input signal to be amplified;

an operational amplifier having an inverting input lead, a noninverting input lead connected to a reference voltage, and an output lead;

a feedback capacitor having a first plate connected to said inverting input lead and a second plate connected to said output lead of said operational amplifier;

input capacitor means connected between said input lead and said inverting input lead of said operational amplifier;

a first feedback initialization switch means connected between said inverting input lead and said output lead of said operational amplifier,

and wherein said second gain stage further comprises;

a second feedback initialization switch means connected between said inverting input lead and said output lead of said operational amplifier;

a third switch means connected between said second plate of said feedback capacitor and said output lead of said operational amplifier;

a fourth switch means connected between said second plate of said feedback capacitor and said reference voltage, wherein said output lead of said operational amplifier of said first gain stage is connected to said input lead of said second gain stage;

and wherein;

during a first time period, said reference voltage is applied to said input lead of said first gain stage, said first feedback initialization switch means are closed, said second feedback initialization switch means is closed, said third switch means is open and said fourth switch means is closed;

during a second time period, said reference voltage is applied to said input lead of said first gain stage, said first feedback initialization switch means are open, said second feedback initialization switch means is closed, said third switch means is open, and said fourth switch means is closed; and

during a third time period, a selected input voltage is applied to said input lead of said first gain stage, said first and said second feedback initialization switch means are open, said third switch means is closed, and said fourth switch means is open,

whereby the effects on the output voltage of the inherent offset voltages of said operational amplifiers and the error voltages created by the operation of said switch means are minimized.

5. The structure as in claim 4 wherein the capacitances of each said input capacitor means is selected during said first time period, and wherein the gain of each said gain stage is equal to the negative of the ratio of the capacitance of said input capacitance means to the capacitance of said feedback capacitor.

6. A method for amplifying an input signal using a gain amplifier comprising at least a first and a second gain stage, wherein each said gain stage comprises:

an input lead for receiving an input signal to be amplified;

an operational amplifier having an inverting input lead, a noninverting input lead connected to a reference voltage, and an output lead;

a feedback capacitor having a first plate connected to said inverting input lead and having a second plate connected to said output lead of said operational amplifier;

input capacitor means connected between said input lead and said inverting input lead of said operational amplifier;

a first feedback initialization switch means connected between said inverting input lead and said output lead of said operational amplifier,

and wherein said second gain stage further comprises;

a second feedback initialization switch means connected between said inverting input lead and said output lead of said operational amplifier; and

a third switch means connected between said second plate of said feedback capacitor and said output lead of said operational amplifier;

a fourth switch means connected between said second plate of said feedback capacitor and said reference voltage, wherein said output lead of said operational amplifier of said first gain stage is connected to said input lead of said second gain stage, said method comprising the steps of;

during a first time period, applying said reference voltage to said input lead of said first gain stage, closing said first feedback initialization switch means, closing said second feedback initialization switch means, opening said third switch means and closing said fourth switch means;

during a second time period, applying said reference voltage to said input lead of said first gain stage, opening said first feedback initialization switch means; and

during a third time period, applying a selected input voltage to said input lead of said first gain stage, opening said second feedback initialization switch means, closing said third switch means, and opening said fourth switch means,

whereby the effects on the output voltage of the inherent offset voltages of said operational amplifiers and the error voltages created by the operation of said switch means are minimized.

7. The method as in claim 6 wherein said input capacitor means comprises:

a plurality of N capacitors, each having a first plate connected in common to said inverting input lead of said operational amplifier, and a second plate selectively connected to said input lead.

8. The method as in claim 7 wherein said first and second plurality of switch means are operated during said first time period to establish an effective capacitance of said input capacitor means and wherein the gain of each said gain stage is equal to the negative of the ratio of the capacitance of said input capacitance means to the capacitance of said feedback capacitor.

9. A gain amplifier comprising at least a first gain stage having a first gain factor and a second gain stage having a second gain factor, wherein each said gain stage comprises:

an input lead for receiving an input signal to the amplified;

an operational amplifier having an inverting input lead, a noninverting input lead connected to a reference voltage, and an output lead;

a feedback capacitor having a first plate connected to said inverting input lead and a second plate connected to said output lead of said operational amplifier;

input capacitor means connected between said input lead and said inverting input lead of said operational amplifier;

feedback initialization switch means connected between said inverting input lead and said output lead of said operational amplifier,

and wherein in said second gain stage, said feedback initialization switch means closes during a period of time when the feedback initialization switch means of said first gain stage closes, said feedback initialization switch means of said second gain stage remaining closed for a period of time after the feedback initialization switch means of said first gain stage opens, the feedback initialization switch means of said second gain stage opening after said period of time, and wherein said second gain stage further comprises;

second switch means connected between said second plate of said feedback capacitor and said output lead of said operational amplifier; and

third switch means connected between said second plate of said feedback capacitor and said reference voltage, wherein said output lead of said operational amplifier of said first gain stage is connected to said input lead of said second gain stage.

10. A method for amplifying an input signal using a gain amplifier comprising at least a first stage and a second stage, wherein each said stage comprises:

an input lead for receiving an input signal to be amplified;

an operational amplifier having an inverting input lead, a noninverting input lead connected to a reference voltage, and an output lead;

a feedback capacitor having a first plate connected to said inverting input lead and a second plate connected to said output lead of said operational amplifier;

input capacitor means connected between said input lead and said inverting input lead of said operational amplifier;

feedback initialization switch means connected between said inverting input lead and said output lead of said operational amplifier,

and wherein said second gain stage further comprises;

second switch means connected between said second plate of said feedback capacitor and said output lead of said operational amplifier;

third switch means connected between said second plate of said feedback capacitor and said reference voltage, wherein said output lead of said operational amplfier of said first gain stage is connected to said input lead of said second gain stage, said method comprising the steps of;

during a first time period, applying said reference voltage to said input lead of said first gain stage, closing said feedback initialization switch means of said first and second gain stages, opening said second switch means, and closing said third switch means;

during a second time period, applying said reference voltage to said input lead of said first gain stage, and opening said feedback initialization switch means of said first gain stage but not said second gain stage; and

during a third time period, applying a selected input voltage to said input lead of said first gain stage, opening said feedback initialization switch means of said second stage, closing said second switch means, and opening said third switch means,

whereby the effects on the output voltage of the inherent offset voltages of said operational amplifiers and the error voltages created by the operation of said switch means are minimized.