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Self-configuring digital processor system with global system

  • US 4,562,535 A
  • Filed: 04/05/1982
  • Issued: 12/31/1985
  • Est. Priority Date: 04/05/1982
  • Status: Expired due to Fees
First Claim
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1. A data processing system comprising:

  • an information bus for transferring data between a plurality of module slots, said plurality of module slots including one unique module slot;

    a logical arbiter memory means connected for transfer of data to and from said information bus, for storing therein a global function table of function names together with their corresponding module number and having an initialization counter;

    a plurality of function modules each connected to one of said module slots for transfer of data to and from said information bus, each function module having(1) a bus priority means for determining a bus priority for control of data transfer via said information bus,(2) function means to perform at least one computational function in response to a corresponding function request from said information bus, each such computational function having a corresponding one of said function names, and(3) initialization means actuated upon each initial application of electric power to said function module, said initialization means including (a) means for determining whether said function module is connected to said unique module slot, (b) means for requesting information bus control immediately upon initialization if said function module is connected to said unique module slot and for waiting for a wake up signal from said function module connected to said unique module slot via said information bus and then requesting information bus control if said function module is not connected to said unique module slot, (c) means for initializing said global function table, setting said initialization counter to "1" and reading and storing said initialization counter state if said function module is connected to said unique module slot, and for reading and storing said initialization counter state and then incrementing said initialization counter if said function module is not connected to said unique module slot, (d) means for assigning one of said module numbers to said function module corresponding to said stored state of said initialization counter thereby making said function module responsive to function requests directed to said module number, (e) means for transferring to said logical arbiter memory means for storage in said global function table said function name and said corresponding module number for each computational function, (f) means for generating said wake up signal and for transmitting said wake up signal to other function modules via said information bus if said function module is connected to said unique module slot, and (g) means for executing a delay for a predetermined period of time upon storing said function name and said module number in said global function table said predetermined period being sufficient to permit initialization by said initialization means of all other function modules; and

    a bus arbitration means connected to said bus priority means of each function module via said information bus for permitting one and only one function module to control data transfer via said information bus based upon said bus priority of any function module requesting control of said information bus.

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