Predistortion circuit

• US 4,564,816 A
• Filed: 05/09/1984
• Issued: 01/14/1986
• Est. Priority Date: 05/09/1984
• Status: Expired due to Fees

• Current Assignee: Lockheed Martin Corporation (Martin Marietta Corporation)
• Original Assignee: RCA Corporation (General Electric Company)
• Inventors: Kumar, Mahesh, Whartenby, James C.
• Primary Examiner(s): Mullins, James B.
• Application Number:
  US06/608,415
• Time in Patent Office: 615 Days
• Field of Search: 330/149, 330/277, 330/124 R, 330/295, 328/163, 455/50, 455/63, 332/18, 332/37 R
• US Class Current: 330/149
• CPC Class Codes: H03F 1/3241 using predistortion circuits H03F1/3211, H03F1/3217 take precedence

Abstract

A predistortion circuit for use with a solid state power amplifier or traveling wave tube amplifier which exhibits phase and amplitude nonlinearities. The predistortion circuit, which produces gain and phase distortion complementary to that of the associated power amplifier, comprises a hybrid circuit for splitting the input signal into two output signals at respective output terminals, the signals having a relative phase difference of 90°, a pair of dual gate FETs or other active nonlinear devices each connected to a different one of the two output terminals and a combiner for combining in-phase the outputs of the nonlinear devices. Bias on the nonlinear devices is adjusted to effect, in the predistortion circuit, nonlinearities complementary to those of the power amplifier.

Claims

1. A predistortion circuit for predistorting a signal applied to a following power amplifier exhibiting phase and amplitude nonlinearities as a function of input power, said circuit comprising in combination:

an input terminal coupled to receive a signal to be amplified and an output terminal coupled to the input of said power amplifier;

means for power dividing a signal applied to the circuit input terminal and for providing a 90°

phase shift of one divided signal relative to the other;

first and second active nonlinear means each adapted for receiving an input signal from a different one of the outputs of said power divider and each adapted for producing an output signal; and

means coupled to receive the output signals from the nonlinear means for combining in phase the signals produced by the active nonlinear means;

said active nonlinear means each adapted for receiving a bias voltage for controlling the amount of distortion produced by the predistortion circuit whereby the predistortion circuit predistorts the signal in a manner complementary to the distortion produced by the following power amplifier.

2. A predistortion circuit for predistorting a signal applied to a following power amplifier exhibiting phase and amplitude nonlinearities as a function of input power, said circuit comprising in combination:

an input terminal coupled to receive a signal to be amplified and an output terminal coupled to the input of said power amplifier;

means for power dividing a signal applied to the circuit input terminal and for providing a 90°

phase shift of one divided signal relative to the other;

first and second dual gate field effect transistors, each having a signal output terminal, a control gate and a signal gate, said signal gate coupled to a different one of the outputs of said power dividing means; and

means coupled between the dual gate FET signal output terminals and circuit output terminal for combining in phase the signal produced by said dual gate FETs,

each said control gate adapted for receiving a bias voltage for controlling the amount of phase and amplitude distortion produced by the predistortion circuit whereby the predistortion circuit predistorts the signal in a manner complementary to the distortion produced by the following power amplifier.

3. The combination as set forth in claim 2 wherein said means for power dividing is a 90°

hybrid.

4. The combination as set forth in claim 2 further including means for applying a bias voltage to each said control gate.

5. The combination as set forth in claim 4 wherein said means for applying a bias voltage applies a different bias voltage to each said control gate.

6. The combination as set forth in claim 4 further including means for applying a bias voltage to each said signal gate.

7. The combination as set forth in claim 6 wherein said means for applying a bias voltage applies a different bias voltage to each said signal gate.

8. The combination as set forth in claim 2 further including means for applying a bias voltage to the control gate of at least one of said FETs which is a function of a changeable parameter.

9. The combination as set forth in claim 2 further including means for applying a bias voltage to the control gate of at least one of said FETs which is a function of input power.

10. The combination as set forth in claim 2 wherein each of said FETs includes source and drain terminals and wherein said predistortion circuit further comprises bias means coupled between said drain and source terminals, the voltage of said bias being a function of a changeable parameter.

11. The combination as set forth in claim 2 wherein each of said FETs includes source and drain terminals and wherein said predistortion circuit further comprises bias means coupled between said drain and source terminals, the voltage of said bias being a function of the temperature of said predistortion circuit.