Partitioned multiprocessor programming system

• US 4,564,903 A
• Filed: 10/05/1983
• Issued: 01/14/1986
• Est. Priority Date: 10/05/1983
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Sears, Glenn W. Jr., Meritt, Allan S., Scalzi, Casper A., Guyette, Richard R., Newson, Stephen R., Hall, Eddie T.
• Primary Examiner(s): NOT, DEFINED
• Application Number:
  US06/539,762
• Time in Patent Office: 832 Days
• Field of Search: 364/200 MS File, 364/300
• US Class Current: 711/201
• CPC Class Codes: G06F 12/0284 Multiple user address space allocation, e.g. using different base addresses interprocessor communication G06F15/163
• CPC Class Codes: G06F 2009/45579 I/O management, e.g. providing access to device drivers or storage
• CPC Class Codes: G06F 9/45541 Bare-metal, i.e. hypervisor runs directly on hardware
• CPC Class Codes: G06F 9/45558 Hypervisor-specific management and integration aspects
• CPC Class Codes: G06F 9/4843 by program, e.g. task dispatcher, supervisor, operating system

Abstract

The disclosure provides a unique multiprocessing (MP) method for executing on plural CPUs of the MP a uniprocessor system (UPS) program not written to run on a MP system. Separate copies of the UPS are provided in the shared main storage (MS) of the MP. A hypervisor type of control program (called a partitioned multiprocessing system, PMP) uses the MP method to enable simultaneous execution of the plural copies of a UPS on different CPUs of the MP as UPS guest virtual machines. PMP can dedicate any CPU to the sole execution of a particular copy of UPS. The copies of the UPS run on the different CPUs independently of each other, but they may share I/O devices.

Claims

1. A control method for a multiprocessor (MP) system having plural CPUs sharing a main storage (MS) and I/O processing means for connecting a plurality of I/O devices to MS, the control method enabling the MP to execute a uniprocessor programming system (UPS) simultaneously on plural CPUs in the MP, even though the UPS is designed to only execute on a uniprocessor (UP) system having the same or a different architecture than the MP, the MP control method comprising:

having plural copies of the UPS in the MS, each copy of the UPS containing an identical set of UPS addresses within a range from UPS address zero to a maximum UPS address determined by the number n of bit positions in each address programmed into the UPS, and n being the order of the highest-order bit position in any explicit UPS address,

locating a different UPS copy boundary for the UPS address zero of each of the plural copies of the UPS, the UPS copy boundaries being different multiples of 2ⁿ bytes at different boundary MS absolute addresses,

executing a plurality of UPS guests simultaneously on different CPUs in the MP under control of a MP control program executable in all CPUs of the MP as a system host, the UPS guests using UPS programs fetchable from the respective UPS copies in MS for execution on the CPUs in the MP,

providing shareability of the I/O devices for the plurality of UPS guests through a set of shared physical paths.

2. A MP control method as defined in claim 1, further comprising:

generating a zone value for each UPS guest by selecting high-order bit positions exceeding order n in the boundary MS absolute address for the respective UPS copy of the UPS guest,

ORing or concatenating the zone value for each UPS guest with UPS addresses obtained from a respective UPS copy by a UPS guest to translate the UPS addresses to MS absolute addresses needed for executing the respective UPS guest in the MP.

3. A MP control method as defined in claim 2, further comprising:

writing the zone value in a field in a control block in MS accessible to I/O processing means that executes channel programs for a respective UPS guest by obtaining the channel programs from a respective UPS copy in MS,

accessing by the I/O processing means of the I/O channel programs in the respective UPS copy in MS with UPS channel program addresses generated by ORing or concatenating the zone value for the respective UPS guest to the high-order end of each UPS channel program address obtained from the respective UPS copy for the I/O processing means,

whereby system performance of the executing UPS guests is enhanced by enabling direct execution of UPS channel programs, and by thereby avoiding CPU software address translation of the channel program addresses by copying the channel program to another area in which the channel program addresses would have been modified to the absolute addresses representing the actual location of the channel program and the data areas addressed by the channel program in MS.

4. A MP control method as defined in claim 3, further comprising:

emulating an architecture state required by a UPS guest while the UPS guest is executing an associated UPS copy in a CPU, a state descriptor (SD) defining the system architecture state for which the UPS was designed, the CPU emulating the architecture state by operating under the SD while executing the UPS guest,

temporarily terminating the emulating architecture state for the CPU when an executing UPS guest requests an I/O device to be started or enables I/O interruptions from I/O devices started by the executing UPS guest,

initiating the MP control program to start the requested I/O device or service an I/O interruption for the executing UPS guest,

continuing the emulating architecture state when the MP control program has completed the starting of the I/O device or has serviced an enabled I/O interruption.

5. A MP control method as defined in claim 4, the MP control program further comprising:

putting a start I/O request by a UPS guest on a start I/O request queue for an I/O device, when the UPS guest makes the start I/O request while the I/O device is busy,

also putting an I/O interruption description on an I/O interruption queue for a UPS guest that started the I/O device causing an I/O interruption, when the I/O interruption occurs while I/O interruptions are disabled for the UPS guest,

handling any start I/O request on the start I/O request queue for the I/O device in response to any I/O interruption for the I/O device when the device goes non-busy.

6. A MP control method as defined in claim 5, the MP control program further comprising:

dequeueing any unserviced I/O interruption description on the I/O interruption queue for any UPS guest in response to a termination of emulation (SIE interception) due to I/O enablement,

simulating the I/O interruption for the UPS guest by executing instructions that transfer the I/O interruption description from the I/O interruption queue to a program save area (PSA) in the guest'"'"'s UPS copy in MS.

7. A MP control method as defined in claim 6, the MP control program interruption simulating submethod further comprising:

accessing by the MP control method of;

(1) a state descriptor (SD) associated with a virtual machine definition (VMD) block for the UPS guest for which the SD defines the emulating architecture state of the CPU executing the UPS guest, the SD including a current PSW location for the UPS guest, and (2) a PSA for the UPS guest in the guest'"'"'s UPS copy, the PSA page including a new I/O PSW location, an old I/O PSW location, and a channel status word (CSW) location for receiving status information about the I/O interruption,

reading the content of the current PSW location from the guest'"'"'s SD, and writing the content into the old I/O PSW location in the guest'"'"'s PSA,

also reading the new I/O PSW location from the guest'"'"'s PSA, and writing the content into the current PSW location in the guest'"'"'s SD,

furthermore reading the I/O interruption description from the I/O interruption queue, and writing that description into the appropriate locations in the guest'"'"'s PSA.

8. A MP control method as defined in claim 5, having a shareable I/O submethod comprising:

providing a physical device (PDEV) control block in MS for each I/O device useable by the MP,

also providing a plurality of shareable logical device (LDEV) control blocks in MS for a respective plurality of UPS guests, each LDEV in the shareable set of LDEVs having a pointer for locating the same PDEV for an I/O device useable by the sharing UPS guests.

9. A MP control method as defined in claim 8, having a start I/O submethod comprising:

finding a LDEV for a UPS guest providing a start I/O request for an I/O device useable by the UPS guest,

locating an associated PDEV for a required I/O device by using the PDEV pointer in the found LDEV,

setting a lock field for the located PDEV before changing any field in the PDEV,

testing the state of a busy field in the located PDEV to determine if an associated I/O device is currently busy,

inserting the start I/O request into a start I/O request queue for the I/O device if the testing of the busy field finds a busy state to exist,

unlocking the lock field for the PDEV in response to inserting the start I/O request into the start I/O request queue.

10. A MP control method as defined in claim 9, the start I/O submethod further comprising:

sensing the busy field in a PDEV being pointed to by a LDEV selected by a guest'"'"'s start I/O request, the PDEV busy field indicating an unbusy state for the associated I/O device,

testing a guest affiliation field in the PDEV for indicating a current I/O device affiliation with a particular UPS guest,

copying into the guest affiliation field in the PDEV an affiliation field in the LDEV if the testing does not indicate a PDEV affiliation with the UPS guest having the start I/O request,

issuing a start subchannel instruction (SSCH) for the UPS guest having the start I/O request to enable the starting of the I/O device,

unlocking the lock field for the PDEV in response to the issuing of the SSCH instruction.

11. A MP control method as defined in claim 10, the start I/O submethod further comprising:

having a hardware affiliation field in each CPU dedicatable to a UPS guest also having a hardware affiliation field for each I/O device,

issuing a modify subchannel (MSCH) instruction to set a value in the affiliation field for the I/O device providing an I/O interrupt to the affiliation value of a CPU which requests a related operation to direct the I/O interrupt to that CPU.

12. A MP control method as defined in claim 10, the start I/O submethod further comprising:

initializing the zone value in a zone field in a MS control block (ORB) associated with each LDEV when each LDEV is initialized for each UPS guest,

microcode ORing or concatenating the content of the zone field with each UPS I/O channel program address provided to an I/O channel from the UPS copy in order to translate each obtained UPS I/O channel program address to a MS absolute address which can access a required MS location in the UPS copy in MS being used by the UPS guest.

13. A MP control method as defined in claim 5, further comprising:

searching by any executing CPU in the MP of a list of dispatcher control blocks (VMDs) in MS, the list having a VMD for each virtual machine useable on the MP system, each UPS guest being associated with a corresponding VMD and a corresponding UPS copy in MS, the search accessing the VMDs one at a time in a predetermined order to determine the dispatching of work on the CPUs of the MP indicated by the VMDs,

determining that work for a VMD being searched is not dedicated exclusively to execution on a particular CPU if the VMD is found not to have a CPU identifier value in a CPU ID field, and if no CPU identifier is found in the VMD CPU ID field, the VMD is for a non-dedicated guest,

locating a CPU PSA (program save area) in MS for the executing CPU by using a prefix address associated with the executing CPU,

examining the state of a CPU dedication field in the CPU'"'"'s PSA, and if no dedication state is therein indicated, the executing CPU is a non-dedicated CPU which can execute work for a non-dedicated guest, but if a dedication state is indicated, the executing CPU can only do work for a dedicated guest,

comparing a CPU ID in the CPU dedication field in the PSA for the executing CPU with the content of the CPU ID field in the VMD being searched, the executing CPU being a dedicated CPU required to execute all work of that VMD if the CPU IDs compare equal.

14. A MP control method as defined in claim 13, further comprising:

sensing a UPS MP field (PMP field) in a VMD being searched if the executing CPU has been found to be either;

(1) dedicated to the VMD being searched, or (2) non-dedicated and the VMD is found non-dedicated,

then if the UPS MP field is sensed to have a UPS state, executing on this CPU any ready work for the searched VMD'"'"'s UPS guest,

but otherwise if no UPS state is sensed in the UPS MP field, executing any ready non-UPS work on this CPU.

15. A MP control method as defined in claim 14, further comprising:

locking the list of dispatcher control blocks (VMDs) by any executing CPU that sets on a lock field for the list, and

unlocking the list by the executing CPU resetting the lock field to an unlocked state when the executing CPU has found a VMD with ready work for the executing CPU or no VMD in the list is found to have ready work for the executing CPU.

16. A MP control method as defined in claim 4, further comprising:

having a first UPS copy in MS with UPS address zero being located at MS absolute address zero to provide a first UPS copy boundary, a first UPS guest virtual machine capable of executing a first guest on a CPU of the MP using the first UPS copy, the CPU emulating the architecture on which the UPS was designed to execute, the first UPS guest being a UPS program obtained from the first UPS copy,

also having a zero value in a zone field associated with each logical device (LDEV) control block provided for each I/O device useable by the first UPS guest,

emulating the first UPS guest virtual machine on the CPU executing the first guest while directly using UPS addresses obtained from the first guest'"'"'s UPS copy as MS absolute addresses without requiring address translation of the UPS addresses in order to access MS by either the emulating CPU or by an I/O processor means executing an I/O channel program for the first guest.

17. A MP control method as defined in claim 16, further comprising:

having a next UPS copy in MS at a next UPS copy boundary address that is an MS absolute address which is the next integer multiple of 2ⁿ beginning with an integer multiple of one, the next UPS copy to be used by a next UPS guest virtual machine capable of executing the next UPS guest on a CPU emulating the architecture on which the UPS was designed to execute, the next UPS guest being a UPS program obtained from the next UPS copy,

also having the zone value equal to the integer multiple generated for the respective UPS copy in a zone field associated with each logical device (LDEV) control block provided for each I/O device useable by the next UPS guest,

providing a segment table (ST) and page tables (PTs) in MS for translating the UPS addresses obtained from the UPS program in the next UPS copy into MS absolute addresses for an executing CPU to enable the next UPS guest to access required locations in the next UPS copy when the emulating CPU is requesting storage accesses into the next UPS copy,

translating by the executing CPU of the UPS addresses obtained directly from the next UPS copy into MS absolute addresses by the CPU using the ST and PTs provided for the next UPS guest,

also translating by an I/O processor means of I/O addresses in MS for the next UPS copy by concatenating zeros to the leftmost end of each I/O address and ORing the concatenated zeroes with the zone field associated with each LDEV for the next UPS guest.

18. A MP control method as defined in claim 8, further comprising:

setting an affiliation field in each LDEV of a UPS guest to an affiliation value, the affiliation values being different for different UPS guests,

also setting a register in a CPU assigned to execute a UPS guest to an affiliation value provided to the affiliation field of LDEVs associated with the UPS guest.

19. A MP control method as defined in claim 18, further comprising:

selecting a different I/O interruption subclass code (ISC) under 370-XA architecture as the affiliation value for setting;

(a) the affiliation fields in each UPS guest'"'"'s LDEVs and (b) a control register in each CPU assigned to execute a UPS guest.

20. A MP control method as defined in claim 19, further comprising:

setting to a dedication state a dedication field in a program save area (PSA) for each CPU in the MP which is to be exclusively used by a UPS guest.

21. A MP control method as defined in claim 20, further comprising:

setting a CPU ID field in a VMD for a UPS guest to the CPU ID value for a CPU which is to be exclusively dedicated to the use of the UPS guest.