Rapid thermal annealing of silicon dioxide for reduced electron trapping

• US 4,566,913 A
• Filed: 07/30/1984
• Issued: 01/28/1986
• Est. Priority Date: 07/30/1984
• Status: Expired due to Term

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Weinberg, Zeev A., Brodsky, Marc H.
• Primary Examiner(s): Roy, Upendra
• Application Number:
  US06/636,042
• Time in Patent Office: 547 Days
• Field of Search: 148/1.5, 148/187, 148/188, 29/571, 29/576 B
• US Class Current: 438/471
• CPC Class Codes: H01L 21/3105 After-treatment
• CPC Class Codes: Y10S 148/004 Annealing, incoherent light
• CPC Class Codes: Y10S 148/118 Oxide films
• CPC Class Codes: Y10S 438/91 Controlling charging state at semiconductor-insulator interface

Abstract

Silicon dioxide insulating films for integrated circuits are provided with enhanced electronic properties, including decreased water content and reduced trapping of electrons, by exposing a metal oxide semiconductor wafer including an exposed silicon dioxide layer, in an ambient of flowing inert gas, to heating radiation from a halogen lamp for a duration on the order of ten seconds to achieve annealing temperature in the range 600C.-800C.

Claims

1. A process for enhancing electronic properties of a thin silicon dioxide insulating layer on an integrated circuit wafer characterized by

(a) positioning the wafer inside an enclosure;

(b) charging said enclosure with a flowing inert gas; and

(c) quickly heating the wafer by radiation heating to a temperature range 300 C-800 C for a duration 3-15 seconds.

2. A process for enhancing electronic properties of a thin silicon dioxide insulating layer on an integrated circuit wafer characterized by

(a) positioning the wafer inside an enclosure;

(b) charging said enclosure with flowing inert gas; and

(c) quickly heating the wafer by radiation heating to a temperature of 600 C for a duration 10 seconds.

3. A process for enhancing electronic properties in a thin silicon dioxide insulating layer on an integrated circuit wafer according to claim 2 further characterized in that

said flowing inert gas is nitrogen.

4. A process for enhancing electronic properties in a thin silicon dioxide insulating layer on an integrated circuit wafer according to claim 2 further characterized in that

said flowing inert gas is argon.