Electronic circuit for monitoring respiratory parameter for controlling operation of implantable medical device

• US 4,576,183 A
• Filed: 09/17/1984
• Issued: 03/18/1986
• Est. Priority Date: 09/21/1983
• Status: Expired due to Term

• Current Assignee: Biotec International SPA, Schiapparelli Medtronic SPA
• Original Assignee: Giancarlo Canducci, Gianni Plicchi
• Inventors: Plicchi, Gianni, Canducci, Giancarlo
• Primary Examiner(s): Kamm, William E.
• Application Number:
  US06/651,354
• Time in Patent Office: 547 Days
• Field of Search: 128/419 PG, 128/716, 128/723
• US Class Current: 600/536
• CPC Class Codes: A61B 5/0809 by impedance pneumography
• CPC Class Codes: A61N 1/36521 the parameter being derived from measurement of an electrical impedance

Abstract

A low electric energy consumption circuit to detect parameters associated to the patient'"'"'s respiration, suitable for the realization of implantable devices, such as implantable and physiologic pacemakers, is designed to detect, at the same sample rate of the impedance in a part of the patient'"'"'s body, the voltage variations V (ΔZL) corresponding to said impedance with both negative and positive variations from the base line. According to a first scheme, these variations V'"'"' (ΔZL) are subsequently processed by means that produce a clean V_OUT signal, e.g. a squared one, which shows a transition every time that the difference between minimum value and maximum value and maximum value and minimum value of the input signal exceeds a fixed a preferably programmable value. According to a second scheme, said variations V'"'"' (ΔZL) are processed by means producing a signal proportional to the variation speed of the body impedance and by means producing a signal Vm (ΔZL) that is the mean value or the average of the values of the input signal and that is proportional to the patient'"'"'s pulmonary ventilation (l/min).

Claims

1. An electronic circuit for detecting a respiratory parameter in a device which is implantable in a patient'"'"'s body and which is operable in response to such respiratory parameter, said circuit comprising:

a measurement and impedance/voltage conversion unit for detecting the impedance of a part of the patient'"'"'s body where the impedance varies in dependence on respiration, said unit including sampling means which effects sampling of the impedance during discrete sampling times occurring at selected time intervals, and means for producing an output signal representative of the sampled impedance values;

signal processing circuit means connected to said unit for producing, in response to the output signal from said unit, a clean, regular signal representative of deviations of the impedance from a selected base impedance value, said signal processing circuit means comprising signal processing means operable for causing the clean, regular signal to vary between two selected amplitude values each time that, and only when, the difference between successive peak values of the output signal exceeds a selected value; and

means for deriving from the clean, regular signal a control signal for controlling the operation of the implantable device.

2. A circuit as defined in claim 1 wherein the sampling time each have a duration of about 122 μ

s and the selected time intervals have a period of about 125 ms.

3. A circuit as defined in claim 1 wherein said signal processing circuit means further comprise:

a first capacitor having a grounded plate and an ungrounded plate, and between which plates there is provided a first reference signal;

a differential amplifier connected to receive said output signal from said unit and said first reference signal for producing a first comparison signal representative of the difference between said output signal and said first reference signal;

a second capacitor having a grounded plate and an ungrounded plate;

a first switch connected between said first differential amplifier and said ungrounded plate of said second capacitor for periodically supplying said first comparison signal to said second capacitor in time coincidence with the discrete sampling times associated with said sampling means, for periodically charging said second capacitor to establish at said ungrounded plate of said second capacitor a comparison signal voltage corresponding to said first comparison signal;

a comparator having a first input connected to receive said comparison signal voltage, a second input connected to receive a constant reference voltage, and an output for providing a comparator output signal having a polarity representative of the polarity of said comparison signal voltage relative to said constant reference voltage;

first and second signal controlled electronic devices each having an input, first and second outputs and signal controllable means for conductively connecting said input to a selected one of said first and second outputs;

means conductively connecting said ungrounded plate of said first capacitor to said first output of said first device and to said second output of said second device, and conductively connecting said ungrounded plate of said second capacitor to said second output of said first device and to said first output of said second device;

first and second current sources supplying currents of respectively opposite polarities, each said current source supplying a sequence of constant amplitude current pulses at a constant rate which is higher than the rate of occurrence of the discrete sampling times associated with said sampling means;

second and third switches each of which is connected between a respective one of said constant current sources and said input of a respective one of said electronic devices, and each of which is electronically controllable for selectively conductively connecting together said respective source and electronic device;

logic circuit means having a main input, a start input, first and second outputs and means logically linking said outputs to said outputs to said inputs, said main input of said logic circuit means being connected to said comparator output, said start input of said logic circuit means being connected to receive a periodic timing signal having the same period as, but offset in time from, the discrete sampling times associated with said sampling means, said first output of said logic circuit means being connected for electronically controlling said second and third switches, said second output of said logic circuit means being connected to said signal controllable means of said first and second electronic devices for supplying a control signal thereto, and said means logically linking said outputs to said inputs being operable for;

supplying to said first output of said logic circuit means a signal for causing each of said second and third switches to a selectively conductively connect together its said respective source and electronic device in response to each appearance of the periodic timing signal at said start input; and

supplying to said second output of said logic circuit means a signal which is a function of the signals at said main and start inputs for controlling said devices in a manner to vary the charge on said second capacitor, after each occurrence of the periodic timing signal, to bring the value of the voltage at said ungrounded plate of said second capacitor to the value of the constant reference voltage, and to simultaneously vary the charge on said first capacitor in a manner to cause the voltage at said ungrounded plate of said capacitor to change in a direction opposite to the direction of change of the voltage at said ungrounded plate of said second capacitor;

whereby the voltage established at said ungrounded plate of said second capacitor during each discrete sampling time is proportional to the difference between the value of said output signal at that discrete sampling time and the value of said output signal at the immediately preceding discrete sampling time.

4. A circuit as defined in claim 3 wherein said signal processing circuit means further comprise:

a fourth switch having an input connected to receive pulses of a clock signal at said constant rate which is higher than the rate of occurrence of the discrete sampling times associated with said sampling means, said fourth switch having an output and electronically controllable means operable for selectively conductively connecting its said input to its said output, said electronically controllable means of said fourth switch being connected to said first output of said logic circuit means for conductively connecting together said input and output of said fourth switch in response ot each appearance of the periodic timing signal at said start input of said logic circuit means and for subsequently disconnecting said input and output of said fourth switch when the value of the voltage at said ungrounded plate of said second capacitor becomes substantially equal to the value of the constant reference voltage; and

a third signal controlled electronic device having an input connected to said output of said fourth switch, first and second outputs and signal controllable means connected to said second output of said logic circuit means for selectively conductively connecting said input of said third device to said first output of said third device during each period that said first and second devices are being controlled to vary the charge on said second capacitor in a first direction and for conductively connecting said input of said third device to said second input of said third device during each period that said first and second devices are being controlled to vary the charge on said second capacitor in a second direction which is opposite to the first direction; and

wherein said signal processing means comprise;

a saturating up-down counter of finite capacity having an up-counting input connected to said first output of said third device, a down-counting input connected to said second output of said third device;

means for counting up pulses applied to said up-counting input to a preselected maximum count value and for counting down pulses applied to said down-counting input to a preselected minimum count value, and output means for providing a first output signal each time said means for counting reaches said preselected maximum count value and for providing a second output signal each time said means for counting reaches said predetermined minimum count value; and

circuit means for producing a square wave signal which assumes a first value in response to each occurrence of the first output signal and which assumes a second value in response to each occurrence of the second output signal.

5. A circuit as defined in claim 4 wherein the difference between the minimum and maximum count values is 32.

6. A circuit as defined in claim 3 wherein said means for producing an output signal in said measurement and impedance/voltage conversion unit comprises a peak-and-hold circuit having a short hold period for storing, during each hold period, a voltage representing the impedance value sampled during a respective sampling time.

7. A circuit as defined in claim 3 wherein said differential amplifier is supplied with operating power only during the times when said first switch is supplying said first comparison signal to said second capacitor for minimizing power consumption.

8. A circuit as defined in claim 3 wherein each current pulse supplied by each of said current sources has a duration of approximately 30 μ

s.

9. An electronic circuit for providing a representation of pulmonary minute ventilation in a cardiac pacer which is implantable in a patient'"'"'s body and which is operable in response to the value of pulmonary minute ventilation, said circuit comprising:

a measurement and impedance/voltage conversion unit for detecting the impedance of a part of the patient'"'"'s body where the impedance varies in dependence on respiration, said unit including sampling means which effects sampling of the impedance during discrete sampling times occurring at selected time intervals, and means for producing an output signal representative of the sampled impedance values;

signal processing circuit means connected to said unit for producing, in response to the output signal from said unit, a signal representative of positive and negative deviations of the impedance from a selected base impedance value; and

means for deriving from the signal representative of deviation a control signal for controlling the operation of the pacer;

wherein said signal processing circuit means comprise;

a first capacitor having a grounded plate and an ungrounded plate, and between which plates there is provided a first reference signal;

a differential amplifier connected to receive said output signal from said unit and said first reference signal for producing a first comparison signal representative of the difference between said output signal and said first reference signal;

a second capacitor having a grounded plate and an ungrounded plate;

a first switch connected between said first differential amplifier and said ungrounded plate of said second capacitor for periodically supplying said first comparison signal to said second capacitor in time coincidence with the discrete sampling times associated with said sampling means, for periodically charging said second capacitor to establish at said ungrounded plate of said second capacitor a comparison signal voltage corresponding to said first comparison signal;

a comparator having a first input connected to receive said comparison signal voltage, a second input connected to receive a constant reference voltage, and an output for providing a comparator output signal having a polarity representative of the polarity of said comparison signal voltage relative to said constant reference voltage;

first and second signal controlled electronic devices each having an input, first and seond outputs and signal controllable means for conductively connecting said input to a selected one of said first and second outputs;

means conductively connecting said ungrounded plate of said first capacitor to said first output of said first device and to said second output of said second device, and conductively connecting said ungrounded plate of said second capacitor to said second output of said first device and to said first output of said second device;

first and second current sources supplying currents of respectively opposite polarities, each said current source supplying a sequence of constant amplitude current pulses at a constant rate which is higher than the rate of occurrence of the discrete sampling times associated with said sampling means;

second and third switches each of which is connected between a respective one of said constant current sources and said input of a respective one of said electronic devices, and each of which is electronically controllable for selectively conductively connecting together said respective source and electronic device;

logic circuit means having a main input, a start input, first and second outputs and means logically linking said outputs to said inputs, said main input of said logic circuit means being connected to said comparator output, said start input of said logic circuit means being connected to receive a periodic timing signal having the same period as, but offset in time from, the discrete sampling times associated with said sampling means, said first output of said logic circuit means being connected for electronically controlling said second and third switches, said second output of said logic circuit means being connected to said signal controllable means of said first and second electronic devices for supplying a control signal thereto, and said means logically linking said outputs to said inputs being operable for;

supplying to said first output of said logic circuit means a signal for causing each of said second and third switches to selectively conductively connect together its said respective source and electronic device in response to each appearance of the periodic timing signal at said start input; and

supplying to said second output of said logic circuit means a signal which is a function of the signals at said main and start inputs for controlling said devices in a manner to vary the charge on said second capacitor, after each occurrence of the periodic timing signal, to bring the value of the voltage at said ungrounded plate of said second capacitor to the value of the constant reference voltage, and to simultaneously vary the charge on said first capacitor in a manner to cause the voltage at said ungrounded plate of said first capacitor to change in a direction opposite to the direction of change of the voltage at said ungrounded plate of said second capacitor;

whereby the voltage established at said ungrounded plate of said second capacitor during each discrete sampling time is proportional to the difference between the value of said output signal at that discrete sampling time and the value of said output signal at the immediately preceding discrete sampling time; and

a fourth switch having an input connected to receive pulses of a clock signal at said constant rate which is higher than the rate of occurrence of the discrete sampling times associated with said sampling means, said fourth switch having an output and electronically controllable means operable for selectively conductively connecting its said input to its said output, said electronically controllable means of said fourth switch being connected to said first output of said logic circuit means for conductively connecting together said input and output of said fourth switch in response to each appearance of the periodic timing signal at said start input of said logic circuit means and for subsequently disconnecting said input and output of said fourth switch when the value of the voltage at said ungrounded plate of said second capacitor becomes substantially equal to the value of the constant reference voltage; and

wherein

said means for deriving a control signal comprise an electronic circuit connected to the output of said fourth switch for producing, as the control signal, a signal having a value whih varies as a function of the average value of the successive voltage values established at said ungrounded plate of said second capacitor, which average value is proportional to pulmonary minute ventilation.