Buck boost switching regulator with duty cycle limiting

• US 4,578,630 A
• Filed: 11/23/1984
• Issued: 03/25/1986
• Est. Priority Date: 11/23/1984
• Status: Expired due to Term

• Current Assignee: Bell Telephone Laboratories, Inc. (Nokia Corporation)
• Original Assignee: AT&T, Inc.
• Inventors: Grosch, James T.
• Primary Examiner(s): Salce, Patrick R.
• Assistant Examiner(s): Ault, Anita M.
• Application Number:
  US06/674,162
• Time in Patent Office: 487 Days
• Field of Search: 323/271, 323/280, 323/282, 323/284, 323/292, 323/350, 323/351, 363/101, 363/131, 363/132, 363/133
• US Class Current: 323/271
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

In a buck-boost, switching regulator, separate signals are developed to control duty cycles of regulator switches. Control exercised by a pair of feedback-determined reference signal voltages through which a ramp signal is swept at inputs of separate comparators, comparator outputs control respective switches. A predetermined maximum voltage difference is permitted between the reference signal voltages. The reference used to control switching of one end of the regulator inductance is limited to a minimum voltage corresponding to a minimum duty cycle greater than 0% while the other reference is used to control the other end of that inductance and is limited to a maximum voltage corresponding to a minimum duty cycle less than 100%. A current limiting feedback from one of the switches is operated in response to current in excess of a predetermined level to force the ramp signal to a level corresponding to 0% duty cycle for both switches at the same time.

Claims

1. A duty-cycle limited, buck-boost, switching regulator including first and second switches for connecting, with adjustable duty cycle, opposite terminals of an inductance to different ones of terminals for receiving operating voltage and said regulator comprising

first and second means, responsive to a regulator output signal, for developing first and second duty cycle control signals for adjusting duty cycles of said first and second switches, and

means for limiting a voltage difference between said control signals to a maximum value substantially less than a value corresponding to a maximum range of duty cycle adjustment of one of said switches.

2. The regulator in accordance with claim 1 in which said limiting means comprises

a slack link coupling means connected between said first and second developing means and comprising

means in said first developing means for operating such developing means to control said first switch as a lead switch with duty cycle adjusted in response to all regulator output signal changes within a predetermined range, and

means in said second developing means for cooperating with said coupling means to operate such developing means to control said second switch as a lag switch with its duty cycle adjusted in response to only those regulator output signal changes which, on increasing control signal, would otherwise require said voltage difference to be greater than said maximum value and, on decreasing control signal, to maintain said maximum value of voltage difference to the extent possible within a predetermined voltage adjustment range for said second switch.

3. The regulator in accordance with claim 2 in which

said second developing means includes means for limiting said second control signal to a voltage range having a minimum value less than said voltage difference and corresponding to a second switch duty cycle substantially greater than 0%.

4. The regulator in accordance with claim 1 in which said voltage difference limiting means comprises

a resistor and a current source connected in series,

means, responsive to a regulator output signal, for shifting a fixed voltage drop across said resistor to different voltage levels without substantially changing the magnitude of said drop, and

means for deriving said duty cycle control signals from opposite ends of said resistor.

5. The regulator in accordance with claim 4 in which said deriving means comprises

means for limiting an excursion magnitude of at least one of said duty cycle control signals.

6. The regulator in accordance with claim 5 in which said excursion limiting means comprises

means, responsive to a duty cycle control signal derived at a lower voltage end of said resistance, both for limiting the last-mentioned control signal maximum excursion at a level corresponding to a duty cycle of less than 100% and for limiting the same control signal minimum excursion at a level corresponding to a duty cycle of more than 0%.

7. The regulator in accordance with claim 6 in which said excursion limiting means further comprises

a resistance voltage divider having a plurality of taps at different voltage points,

means for coupling a higher voltage one of said taps to set a threshold for said maximum excursion limiting means, and

means for coupling a lower voltage one of said taps to set a threshold for said minimum excursion limiting means.

8. The regulator in accordance with claim 7 in which said excursion limiting means further comprises

means for comparing voltages at said lower voltage one of said taps and at said lower voltage end of said resistor and when the latter is at a lower voltage directing current into said current source and thereby clamping said second deriving means at a voltage approximately equal to the voltage at said lower voltage one of said taps.

9. The regulator in accordance with claim 1 which further comprises

means for generating a recurrent ramp signal,

first and second comparators each having an output connected for opening and closing a different one of said first and second switches and having inputs connected to receive said ramp signal and a different one of said reference signals, and

means, responsive to current of at least a predetermined level in one of said switches for clamping an output of said generating means to a value corresponding to 0% duty cycle for both of said switches.