Process for forming slots of different types in self-aligned relationship using a latent image mask
First Claim
1. A process for fabricating slots of different types in self-aligned relationship, comprising the steps of:
- applying to a semiconductor substrate a layer of a masking material in which latent images of slots of different types are to be formed;
patterning said layer of masking material to define within said layer images for slots of at least a first type and a second type;
etching said layer of masking material to expose the substrate where slots of said first type are to be formed;
etching said exposed regions of said substrate to form slots of said first type;
etching said latent image mask layer to expose the substrate where slots of said second type are to be formed; and
etching said exposed regions of said substrate to form slots of said second type whereby said slots of said first type and of said second type are arrayed in self-aligned relationship.
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Abstract
Slots of different types are fabricated using a single latent image mask. The slots of different types are thus located with respect to each other in a self-aligned relationship. In one embodiment an oxide of the semiconductor material, e.g., silicon dioxide, is used as a unitary masking layer. The slots of various types are defined in the mask and are fabricated in succession by relying on a universal etch and differential thicknesses for the oxide layers over slots of the different types. When the slots are formed they are filled with a suitable material. In another embodiment at least a dual layer latent image mask is used in which the two materials have different etch properties. One layer is used as a stop etch layer during fabrication of one of the slot types.
39 Citations
24 Claims
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1. A process for fabricating slots of different types in self-aligned relationship, comprising the steps of:
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applying to a semiconductor substrate a layer of a masking material in which latent images of slots of different types are to be formed; patterning said layer of masking material to define within said layer images for slots of at least a first type and a second type; etching said layer of masking material to expose the substrate where slots of said first type are to be formed; etching said exposed regions of said substrate to form slots of said first type; etching said latent image mask layer to expose the substrate where slots of said second type are to be formed; and etching said exposed regions of said substrate to form slots of said second type whereby said slots of said first type and of said second type are arrayed in self-aligned relationship. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A process for fabricating slots of different types in self-aligned relationship at a surface of a semiconductor material substrate, said process comprising the steps of:
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(a) applying a layer of a first masking material over said substrate surface; (b) exposing a portion of said substrate surface; (c) covering said layer of a first masking material and the otherwise exposed portion of said substrate surface with a cover layer of a second masking material; (d) etching through said cover layer of said second masking material over said otherwise exposed portion of said substrate surface to provide a latent image mask for a slot of said first type and over said layer so as to provide a latent image mask for a slot of said second type; (e) etching selectively the material exposed by said latent image mask for said first type of said slots so as to form said first type of slot; (f) filling said first type of slot with a filler material; (g) removing excess filler material; (h) applying a protective layer over said filled slots of said first type; (i) etching through any remaining thickness of said layer of a first masking material; and (j) etching into any underlying material to form said second type of slot. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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22. A process of forming slots at the surface of semiconductor layer in the fabrication of an integrated circuit comprising the steps of:
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(a) providing a first mask layer overlying a first portion of said semiconductor layer and leaving exposed a second portion of said semiconductor layer; (b) providing a second mask layer overlying said first mask layer and said second portion of said semiconductor layer; (c) etching away a first portion of said second mask layer so as to expose a corresponding portion of said second portion of said semiconductor layer and a second portion of said second mask layer so as to expose a corresponding portion of said first mask layer; (d) etching away that portion of said semiconductor layer exposed by the removal of said first portion of said second mask layer so as to open a first slot; (e) filling said first slot with a first filler material; (f) etching away that portion of said first mask layer exposed by the removal of said second portion of said second mask layer and the subsequently exposed corresponding portion of said semiconductor layer so as to open a second slot; and (g) filling said second slot with a second filler material. - View Dependent Claims (23, 24)
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Specification