Graphic video overlay system providing stable computer graphics overlayed with video image

• US 4,580,165 A
• Filed: 04/12/1984
• Issued: 04/01/1986
• Est. Priority Date: 04/12/1984
• Status: Expired due to Term

• Current Assignee: General Counsel PC
• Original Assignee: General Electric Company
• Inventors: Ferry, George A., Patton, Thomas
• Primary Examiner(s): Groody, James J.
• Assistant Examiner(s): Dunnam, Michael P.
• Application Number:
  US06/599,675
• Time in Patent Office: 719 Days
• Field of Search: 358/17, 358/149, 358/903, 358/148, 358/319, 358/324, 358/325, 358/158, 358/150, 358/153, 358/154, 340/814, 340/721, 340/745, 340/734, 340/747
• US Class Current: 348/510
• CPC Class Codes: H04N 5/12 Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
• CPC Class Codes: H04N 9/74 for obtaining special effects H04N9/65 - H04N9/73 take precedence

Abstract

A color graphic overlay system for providing high speed, high resolution color graphics display combined with a video image from a videodisc, videotape or camera. The system includes a video mixing module and a color graphics module which generates the graphics while the video mixing module performs the overlay function. A composite sync processor filters an external video composite sync signal to produce a processed horizontal sync pulse that is phase adjustable and ultimately used by a phase lock loop to lock the horizontal component of the external video composite sync signal to the horizontal component of the graphics composite sync. The phase lock loop employs the processed horizontal sync pulse to generate a high frequency clock used by the color graphics module to produce its own horizontal sync pulses. Horizontal synchronization means provide a phase adjustable window which regulates the phase lock loop to eliminate the unstable effects of gross phase differences of external video by slowly time sliding the processed horizontal sync pulse to extend or reduce its period until the phase lock loop can compensate therefor.

Claims

1. A color graphic overlay system for providing high speed, high resolution color graphics display combined with a video image from an external video source, comprising:

a color graphics module and a video mixing module combined to provide a composite of a graphics image overlayed on the video image, said color graphics module having timing means for producing both color graphics horizontal and vertical sync pulses;

said video mixing module including a video decorder for separating an external video signal into its red, green and buel (RGB) components and for producing an external video composite sync signal therefrom, and sync processor means for synchronizing color graphics signals both horzontally and vertically with said external video composite sync signal;

said sync processor means including horizontal sync processor means for filtering said external video composite sync signal and producing a processed horizontal sync pulse that is phase adjustable and vertical sync processor means for using said external video composite sync signal to produce external video vertical sync siganls for vertically synchronizing said video image and said color graphics image;

a phase lock loop connected to said horizontal sync processor means for receiving said processed horizontal sync pulse and also connected to said color graphics module for receiving a color graphics horizontal sync pulse, the output line of said phase lock loop providing a high frequency clock signal which is connected to said timing means in said color graphics module and used to generate said color graphics horizontal sync pulse, said phase lock loop providing adjustment of the frequency of said high frequency clock output until said color graphics horizontal sync pulse is in phase with said processed horizontal sync pulse and thereby compensates for minor phase differences therebetween;

said horizontal sync processor means including a valid sync detector for determining a valid sync condition if said external video horizontal sync signal is within a predetermined phase adjustable sync timing window, a sync filter connected to the output of said valid sync detector for either providing said external video horizontal sync signal as said processed horizontal sync pulse when a valid sync condition exists or for providing an internal standard sync as said preocessed horizontal sync signal in the absence of a vlaid sync condition, and means for time sliding said timing window incrementally towards the horizontal component of said external video composite sync signal until said signal is within said timing window and a valid sync condition exists wherein said sync filter provides said external video horizontal sync signal as said processed horizontal sync pulse to said phase lock loop, whereby said timing window regulates said phase lock loop by slowly time sliding said processed horizontal sync pulse towards said external video composite sync pulse until said phase lock loop can compensate therefor; and

multiplexer means for combining said video image with said color graphics image to provide a composite image.

2. System as recited in claim 1 wherein said means for time sliding said phase adjustable sync timing window includes a counter which receives its timing pulses from an internal oscillator providing said internal standard sync.

3. A system as recited in claim 1, wherein said horizontal sync processor means further includes means for detecting when said system is in a search and scan operation during the inactive video display time, said detection means being used to enable said horizontal sync processor means and said means for time sliding said sync timing window to extend or reduce the period of said timing window and thereby provide loose synchronization only during said inactive period of said video.

4. System as recited in claim 1 wherein said valid sync detector provides a valid sync condition when less then a predetermined number of invalid sync pulse detections are determined within the timing window and indicates an invalid sync condition when more than said predetermined number of horizontal sync detections are outside said timing window.

5. System as recited in claim 1, further comprising in said horizontal sync processor means, means for switching said horizontal sync processor means from a standard sync state in which said processed horizontal sync state pulse is based upon said internal standard sync, to an acquire state wherein said system will attempt to retain a loose horizontal lock with said external video composite sync.

6. System as recited in claim 1, further comprising means for detecting when a predetermined number of valid sync pulses are detected during the period when said horizontal sync processor means employs said internal standard sync of said horizontal sync processor means, after which said system is switched back to a condition in which said horizontal sync processor means is horizontally locked to said external video composite sync signal by means of said phase lock loop.

7. A color graphic overlay system for providing high speed, high resolution color graphics display combined with a video image from external video source, comprising:

a color graphics module and a video mixing module combined to provide a composite of a graphics image overlayed on the video image, said color graphics module having timing means for producing both color graphics horizontal and vertical sync pulses;

said video mixing module including a video decoder for separating an external video signal into its red, green and blue (RGB) components and for producing an external video composite sync signal therefrom, and sync processor means for synchronizing color graphics signals both horizontally and vertically with said external video composite sync signal;

said sync processor means including horizontal sync pocessor means for producing a processed horizontal sync pulse that is phase adjustable and ultimately used to lock the horizontal component of said external video composite sync signal to said color graphics horizontal sync pulse, and vertical sync processor means for using said external video composite sync signal to produce external video vertical sync signals for vertically synchronizing said video image and said color graphics image;

a phase lock loop connected to said horizontal sync processor means for receiving said processed horizontal sync pulse and also connected to said color graphics module for receiving a color graphics horizontal sync pulse, the output of said phase lock loop providing a high frequency clock signal to said timing means in said color grpahics module for generating said color graphics horizontal sync pulse, said phase lock loop providing adjustment of the frequency of said high frequency clock output until said color graphics horizontal sync pulse is in phase with said processed horizontal sync pulse and thereby compensates for minor phase differences; and

said horizontal sync processor means including a valid sync detector for determining a valid sync condition when said external video horizontal sync signal occurs within a sync timing window during which time said external video horizontal sync signal is provided as said processed horizontal sync pulse to said phase lock loop, said horizontal sync processor means alternatively providing an internal standard sync as said processed horizontal sync signal to said phase lock loop in the absence of said valid sync condition, and means for gradually time sliding said sync timing window towards said external video horizontal sync signal until said signal is within said timing window and a valid sync condition exists wherein said external video horizontal signal is provided as said processed horizontal sync pulse to said phase lock loop;

whereby a tight horizontal and vertical synchronization of said graphics display with said external video image is provided when said external video image is stable, and a tight vertical synchronization and a loose horizontal synchronization of said graphics display with said external video image is provided when said video image may be unstable, thereby maintaining a stable visible video monitor raster and graphics display.

8. System as recited in claim 7 wherein said horizontal sync processor means includes filter gating means connected to the output of said valid sync detector for passing said external video horizontal sync signal to said phase lock loop during a valid sync condition.

9. System as recited in claim 7 further comprising means for inserting internally generated horizontal sync pulses to said horizontal sync processor means in the absence of a valid sync condition.

10. An improved color graphics overlay system for providing high speed, high resolution color graphic display images combined with a video image from an external source including a color graphics module for generating color graphics image signals responsive to an external computer, said color graphics module having timing means for producing both color graphics horizontal and vertical sync pulses, and a video mixing module for generating multiplexed composite image signals for a color monitor responsive to said color graphics image signals and to video image signals from an external video source, wherein the improvement comprises:

a. said video mixing module including;

i. a video decoder for separating an external video signal into its red, green and blue (EV-RGB) components and for producing an external video composite sync signal (EV-CSYNC),

ii. sync processor means responsive to said external video composite sync signal (EV-CSYNC) for synchronizing signals produced by said color graphics module with said video image signals from an external video source,

iii. a phase lock loop responsive to output signals from said sync processor means and said graphics module for producing clock signals for use by said timing means of said color graphics module as an input to produce said horizontal and vertical sync pulses, and

iv. multiplexer means for combining said color graphics image signals and said video image signals to form said multiplexed composite image signals;

b. said sync processor means including;

i. horizontal sync processor means for filtering said external video composite sync signal (EV-CSYNC) to produce a phase adjustable processed horizontal sync pulse (P-HSYNC), and

ii. vertical sync processor means for using said external video composite sync signal (EV-CSYNC) to produce external video vertical sync (EV-VSYNC) and external video odd field (EV-ODFIELD) signals for vertically synchronizing said video image and said color graphics images;

c. said horizontal sync processor means including;

i. a valid sync detector for determining a valid sync condition when the horizontal component (HC) of the said external video composite sync signal (EV-CSYNC) is within a predetermined phase adjustable sync timing window,

ii. a sync filter responsive to the output of said valid sync detector for providing either said horizontal component (HC) of said external video composite horizontal sync signal (EV-CSYNC) as said processed horizontal sync pulse (P-HSYNC) when a valid sync condition exists or an internal standard sync signal as said processed horizontal sync signal (P-HSYNC) in the absence of a valid sync condition, and

iii. means for time sliding said timing window incrementally towards said horizontal component of said external video composite sync signal (EV-CSYNC) until said signal is within said timing window indicating the existence of a valid sync condition wherein said sync filter provides said horizontal component (HC) as said processed horizontal sync pulse (P-HSYNC) to said phaselock loop, and

d. said horizontal sync processor means, said color graphic timing means and said phase lock loop being interconnected to cause said phase lock loop to adjust the frequency of said clock signals responsive to said processed horizontal sync pulse (P-HSYNC) and said color graphics horizontal sync pulse (CGM-HSYNC) which is in turn responsive to said clock signals until said color graphics horizontal sync pulse (CGM-HSYNC) is in phase with said processed horizontal sync pulse (P-HSYNC),

whereby said timing window regulates said phase lock loop by slowly time sliding said processed horizontal sync pulse (P-HSYNC) towards said horizontal component (HC) of said external video composite sync signal (EV-CSYNC) until said phas lock loop can compensate by adjustment of the frequency of said clock signals.