Microcomputer based system for performing fast Fourier transforms
First Claim
1. A fast Fourier transform (FFT) circuit comprising:
- (a) a microprocessor;
(b) a program memory for said microprocessor;
(c) a first random access memory for said microprocessor;
(d) an address decoder for said first random access memory;
(e) clock means for providing clock inputs to said microprocessor;
(f) input/output ports, said units coupled together by means of address, data and control busses;
(g) a plurality of signals in digital form to be transformed being an input to one of said input/output ports;
(h) an FFT module receiving a digital word and performing a fast Fourier transform on said word;
(i) a bidirectional buss transceiver for providing data to and receiving data from said FFT module having one of its data inputs coupled thereto;
(j) an FFT random access memory coupled to said data and control busses, said data busses also coupled to the other data input of said bidirectional bus transceiver;
(k) an FFT multiplexer coupling the address lines from said address bus for said random access memory into said FFT random access memory permitting inputting the addresses in normal order, and, upon selection, reverse order; and
(l) means receiving an output from said address decoder and providing an input to said FFT multiplexer for said selecting between a normal order and a reverse order one for use during input of data to said FFT module and the other for use after data has been converted by said FFT module.
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Accused Products
Abstract
A system for the on-line analysis and topographic display of human brain electrical activity which includes amplifying filtering and converter circuits for generating a plurality of signals, representing electrical activity at a plurality of predetermined data point locations on a patient'"'"'s head in digital form, a first microprocessor and associated circuits to preprocess the digital signals into a predetermined format, and a second microprocessor and associated topographic map generator forming an image computation and display unit receiving the preprocessed digital signals as inputs from the image computation and display unit the topographic mag generator defining a map of a plan or elevation view of the brain containing a plurality of pixel points far in excess of the number of data points and interpolating the digital signals, so as to provide a value for each pixel on the map and providing the pixel information as outputs in synchronism with a horizontal and vertical scan, and a video monitor receiving the output of the image computation and display unit as an input.
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Citations
8 Claims
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1. A fast Fourier transform (FFT) circuit comprising:
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(a) a microprocessor; (b) a program memory for said microprocessor; (c) a first random access memory for said microprocessor; (d) an address decoder for said first random access memory; (e) clock means for providing clock inputs to said microprocessor; (f) input/output ports, said units coupled together by means of address, data and control busses; (g) a plurality of signals in digital form to be transformed being an input to one of said input/output ports; (h) an FFT module receiving a digital word and performing a fast Fourier transform on said word; (i) a bidirectional buss transceiver for providing data to and receiving data from said FFT module having one of its data inputs coupled thereto; (j) an FFT random access memory coupled to said data and control busses, said data busses also coupled to the other data input of said bidirectional bus transceiver; (k) an FFT multiplexer coupling the address lines from said address bus for said random access memory into said FFT random access memory permitting inputting the addresses in normal order, and, upon selection, reverse order; and (l) means receiving an output from said address decoder and providing an input to said FFT multiplexer for said selecting between a normal order and a reverse order one for use during input of data to said FFT module and the other for use after data has been converted by said FFT module. - View Dependent Claims (2, 3)
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4. A method of performing an Fast Fourier Transform (FFT) on an M point data segment comprising:
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(a) storing digital signals corresponding to the M points to be transformed in a random access memory; (b) transferring an N point data block from said first random access memory to an FFT module for performing a transform on N points, using a microprocessor and through a bidirection bus transceiver controlled by said microprocessor, where M is equal to N times P where P is an integer equal to or greater than 2; (c) performing an FFT in said FFT module on said N points under command of said microprocessor; (d) transferring the transformed N point data block from said FFT to an FFT random access memory through said bus transceiver using said microprocessor; (e) carrying out steps (b) to (d) P times so as to completely transform said M points of data; (f) unloading the transformed data from said FFT random access memory to said first random access memory using said microprocessor; and (g) multiplexing address lines into said FFT random access memory between a normal order and a reverse order, one of said orders being used during input of data to said FFT random access memory and the other during unloading of data from said FFT random access memory to said first random access memory. - View Dependent Claims (5, 6, 7, 8)
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Specification