Method of fabricating a semiconductor device

• US 4,588,472 A
• Filed: 01/26/1984
• Issued: 05/13/1986
• Est. Priority Date: 01/26/1983
• Status: Expired due to Term

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Shimizu, Isao
• Primary Examiner(s): Powell, William A.
• Application Number:
  US06/574,085
• Time in Patent Office: 838 Days
• Field of Search: 156/628, 156/643, 156/647, 156/653, 156/657, 156/659.1, 156/662, 148/1.5, 148/187, 148/175, 29/576 B, 29/580, 29/610 SG, 338/2, 338/4, 338/47, 357/26, 357/55, 357/60, 73/777
• US Class Current: 438/53
• CPC Class Codes: G01L 9/0042 Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms details about the integration or bonding of piezoresistor in or on the diaphragm G01L9/0052 and G01L9/0057 respectively
• CPC Class Codes: H01L 21/30608 Anisotropic liquid etching H01L21/3063 takes precedence
• CPC Class Codes: H01L 29/84 controllable by variation of applied mechanical force, e.g. of pressure
• CPC Class Codes: Y10S 438/924 To facilitate selective etching
• CPC Class Codes: Y10T 29/49103 Strain gauge making

Abstract

This invention relates to the method of forming a semiconductor device having a diaphragm.

A highly doped semiconductor region is formed in the peripheral portion of the semiconductor substrate around the part in which the diaphragm is to be formed, and then that part is etched. Thereby, the diaphragm of a semiconductor pressure sensor can be formed very accurately to a desired shape.

Claims

1. A method of fabricating a piezoresistive semiconductor pressure sensor having a predetermined diaphragm configuration, comprising the steps of:

forming a highly doped region, in a single crystal semiconductor substrate with first and second principal planes facing each other, by covering at least part of said first principal plane by a mask for defining said predetermined diaphragm configuration, said mask having substantially the same configuration as said predetermined diaphragm configuration, and selectively introducing impurities into the portion thereof which is not covered by said mask;

forming an epitaxial semiconductor region on said second principal plane;

forming semiconductor regions for gauge resistors by selectively introducing impurities into the principal plane of the epitaxial semiconductor region positioned on a portion in which said highly doped region is not formed; and

etching a portion of said first principal plane in which said highly doped region is not formed, to thereby form said predetermined diaphragm configuration, whereby a controlled recess providing the predetermined diaphragm configuration, independent of the crystal orientation of the semiconductor substrate, is formed.

2. The method of fabricating piezoresistive semiconductor pressure sensor as set forth in claim 1, wherein said single crystal semiconductor substrate is a single crystal silicon substrate of which the first and second principal planes are positioned in or adjacent to the (100) plane of said single crystal silicon substrate.

3. The method of fabricating piezoresistive semiconductor pressure sensor as set forth in claim 2, wherein the etching step is achieved by anisotropic etching using alkaline etchants.

4. The method of fabricating a piezoresistive semiconductor pressure sensor as set forth in claim 3, wherein said highly doped region has an ion impurity concentration sufficient to prevent etching of said highly doped region by said alkaline etchants.

5. The method of fabricating a piezoresistive semiconductor pressure sensor as set forth in claim 1, wherein the highly doped region has an ion impurity concentration of at least 10¹⁹ atoms/cm³.

6. The method of fabricating a piezoresistive semiconductor pressure sensor as set forth in claim 1, wherein said predetermined diaphragm configuration is circular.

7. The method of fabricating a piezoresistive semiconductor pressure sensor as set forth in claim 1, wherein said etching is a chemical etching.

8. The method of fabricating a piezoresistive semiconductor pressure sensor as set forth in claim 1, further comprising the step of forming another highly doped region by selectively introducing impurities into the second principal plane at a position on the portion in which the highly doped region is not formed.

9. The method of fabricating a piezoresistive semiconductor pressure sensor as set forth in claim 1, further comprising the step of forming another highly doped region in the second principal plane of the semiconductor substrate.

10. The method of fabricating a piezoresistive semiconductor pressure sensor as set forth in claim 9, wherein the highly doped region and the another highly doped region are formed at corresponding positions in the first and second principal planes opposed to each other.

11. The method of fabricatng a piezoresistive semiconductor pressure sensor as set forth in claim 5, wherein said impurities are boron ions.

12. The method of fabricating a piezoresistive semiconductor pressure sensor as set forth in claim 1, wherein said highly doped region is formed by selectively introducing the impurities and driving the impurities into the substrate to form deep highly doped regions.