Multiple channel power line monitor

• US 4,589,074 A
• Filed: 08/31/1983
• Issued: 05/13/1986
• Est. Priority Date: 08/31/1983
• Status: Expired due to Fees

• Current Assignee: The Boeing Co.
• Original Assignee: The Boeing Co.
• Inventors: Von Bokern, Greg J., Thomas, Teddy R., Sommer, David L.
• Primary Examiner(s): Krass, Errol A.
• Assistant Examiner(s): Herndon, Heather R.
• Application Number:
  US06/527,999
• Time in Patent Office: 986 Days
• Field of Search: 364/483, 364/481, 364/482, 364/492, 364/487, 364/480, 324/52, 324/112, 324/102, 324/113, 73/170 R, 73/73 AT, 179/175.3 F
• US Class Current: 702/68
• CPC Class Codes: G01R 31/50 Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections testing of sparking plugs H01T13/58
• CPC Class Codes: G01R 31/58 Testing of lines, cables or conductors testing of electric windings G01R31/72

Abstract

A power line monitor capable of monitoring multiple power lines simultaneously includes a channel circuit for each monitored line, a common logic circuit and control logic. The signal on each power line is analog-to-digital converted and stored in channel circuit memory. A trigger detector produces a trigger detect signal in response to the monitored signal exceeding a preset limit. The trigger detect signal initiates a delay time during which the conversion and storing process in the triggered channel continues. The delay time is selected such that a desired amount of both pre- and post trigger data is retained in the associated channel memory. The control logic is operable in either a manual or an automatic mode. In the manual mode, memory stored data in a triggered channel is repetitively cycled to a digital-to-analog converter provided in the common logic, whereby an operator can monitor the stored waveform and, if desired, load the channel memory contents to magnetic tape. In the automatic mode, the control logic loads the associated channel memory directly to magnetic tape, then resets the channel in preparation for continued power line monitoring.

Claims

1. Apparatus for monitoring a plurality of electrical power carrying lines comprising:

a plurality of channel circuits, each channel circuit including;

(a) an input adapted to be coupled to one of said power carrying lines for sensing the signal thereon,

(b) trigger detector means for producing a trigger detect signal in response to said sensed signal at said input exceeding a predetermined reference level,

(c) analog-to-digital converter means for controllably converting said sensed signal at said input to corresponding digital signals,

(d) memory means for controllably storing said analog-to-digital converter means produced digital signals, and

(e) timing and control circuit means responsive to control signals for controlling said analog-to-digital converter means and said memory means;

a common logic circuit comprising;

(a) a sampling clock generator means for producing a sampling clock signal, said sampling clock signal being coupled to each channel circuit timing and control circuit means for controlling the sampling rate of the corresponding analog-to-digital converter,

(b) channel select logic means responsive to control signals for selecting a predetermined one of the plurality of channel circuits, and

(c) digital-to-analog converter means for converting the stored digital signals in a selected channel circuit memory means to a corresponding analog signal; and

control logic means for controlling the operation of the channel circuits and the common logic circuit in either a selected manual or an automatic mode, said control logic means including storage means for controllably storing digital signals,

the control logic means being operable in the manual mode for;

(a) responding to a trigger detect signal produced by the trigger detector means of a channel circuit to cause the channel select logic means to select said channel circuit such that an analog signal out of said digital-to-analog converter means is provided for review by an operator, and

(b) providing an operator with a means for loading the digital signals stored in the memory means of said selected channel circuit into said storage means,

the control logic means being operable in the automatic mode for;

responding to a trigger detect signal produced by the trigger detector means of a channel circuit to cause the memory means of said channel circuit to load the digital signals stored therein into said storage means;

said control logic means including means operable in the manual mode and the automatic mode for assigning a predetermined priority to each of the channel circuits such that in the even at least two trigger detector means produce trigger signals simultaneously, each circuit channel is processed in the order of its assigned priority.

2. The apparatus of claim 1 wherein said timing and control circuit means includes means for controlling the memory means such that:

(a) in the absence of a trigger signal produced by an associated trigger detector in the same channel circuit, successive digital signals from the analog-to-digital converter are stored in successive memory locations of said memory means until said memory means is fully loaded at which point subsequent digital signals are stored in successive memory means locations thereby erasing the previously stored digital signals, whereby the digital signals stored in said memory means at any given time represent the most recent, successive analog-to-digital produced digital signals,

(b) upon the occurrence of a trigger signal from an associated trigger detector in the same channel circuit, the memory means is caused to inhibit storing additional digital signals once it has stored a predetermined number of digital signals subsequent to the occurrence of said trigger signal, whereby the memory means is controlled to store a predetermined number of digital signals prior, and subsequent to the occurrence of said trigger signal.

3. The apparatus of claim 2 wherein the timing and control means includes means for allowing an operator to control the number of digital signals which are stored in the memory means prior, and subsequent to the occurrence of said trigger signal.

4. The apparatus of claim 2 wherein the control logic means includes means operable in the manual mode and the automatic mode for assigning a predetermined priority to each of the channel circuits such that in the event at least two trigger detectors produce trigger signal simultaneously, each circuit channel is processed in the order of its assigned priority, with an inhibit of a memory means being removed, and the corresponding channel circuit being reset to store digital signals, upon the occurrence of one of:

(i) an operator input command to resume storing of the digital signals in the memory means,

(ii) completion of the loading of all of the digital signals stored in said memory means into said storage means.

5. The apparatus of claim 4 wherein said sampling clock generator means provides a plurality of sampling clock signals, each sampling clock signal being of a different predetermined frequency, and wherein the control logic means includes operator input controls for controlling the timing and control circuit means of each channel circuit such that a user selected one of the sampling clock signals is coupled to the associated analog-to-digital converter for controlling the sampling rate thereof.

6. The apparatus of claim 4 further including means for establishing a trigger link relationship between any two operator selected chanel circuits such that a trigger detect signal produced by one channel causes a trigger detect signal to be produced in the other channel.

7. The apparatus of claim 4 wherein said control means further includes means operable in the manual mode for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means such that the signal produced at the output of the digital-to-analog converter is a repeating sequence viewable by an operator on an oscilloscope.

8. The apparatus of claim 4 wherein said control means includes means for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means at said sampling clock signal rate such that the signal produced at the output of the digital-to-analog converter is a repeating sequence representative of the signal sensed on the corresponding power carrying line.

9. The apparatus of claim 4 wherein the control logic means includes means for allowing an operator to select a predetermined portion of the digital signals stored in each memory means and load only said selected portion into said storage means.

10. The apparatus of claim 9 further including means for establishing a trigger link relationship between any two operator selected channel circuits such that a trigger detect signal produced by one channel causes a trigger detect signal to be produced in the other channel.

11. The apparatus of claim 9 wherein said sampling clock generator means provides a plurality of sampling clock signals, each sampling clock signal being of a different predetermined frequency, and wherein the control logic means includes operator input controls for controlling the timing and control circuit means of each channel circuit such that a user selected one of the sampling clock signals is coupled to the associated analog-to-digital converter for controlling the sampling rate thereof.

12. The apparatus of claim 9 wherein said control means further includes means operable in the manual mode for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means such that the signal produced at the output of the digital-to-analog converter is a repeating sequence viewable by an operator on an oscilloscope.

13. The apparatus of claim 9 wherein said control means includes means for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means at said samplng clock signal rate such that the signal produced at the output of the digital-to-analog converter is a repeating sequence representative of the signal sensed on the corresponding power carrying line.

14. The apparatus of claim 1 wherein the control logic means includes means for allowing an operator to select a predetermined portion of the digital signals stored in each memory means and load only said selected portion into said storage means.

15. The apparatus of claim 14 wherein said control means further includes means operable in the manual mode for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means such that the signal produced at the output of the digital-to-analog converter is a repeating sequence viewable by an operator on an oscilloscope.

16. The apparatus of claim 14 wherein said control means includes means for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means at said sampling clock signal rate such that the signal produced at the output of the digital-to-analog converter is a repeating sequence representative of the signal sensed on the corresponding power carrying line.

17. The apparatus of claim 14 wherein said sampling clock generator means provides a plurality of sampling clock signals, each sampling clock signal being of a different predetermined frequency, and wherein the control logic means includes operator input controls for controlling the timing and control circuit means of each channel circuit such that a user selected one of the sampling clock signals is coupled to the associated analog-to-digital converter for controlling the sampling rate thereof.

18. The apparatus of claim 14 further including means for establishing a trigger link relationship between any two operator selected channel circuits such that a trigger detect signal produced by one channel causes a trigger detect signal to be produced in the other channel.

19. The apparatus of claim 1 wherein said sampling clock generator means provides a plurality of sampling clock signals, each sampling clock signal being of a different predetermined frequency, and wherein the control logic means includes operator input controls for controlling the timing and control circuit means of each channel circuit such that a user selected one of the sampling clock signals is coupled to the associated analog-to-digital converter for controlling the samping rate thereof.

20. The apparatus of claim 19 further including means for establishing a trigger link relationship between any two operator selected channel circuits such that a trigger detect signal produced by one channel causes a trigger detect signal to be produced in the other channel.

21. The apparatus of claim 19 wherein said control means further includes means operable in the manual mode for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means such that the signal produced at the output of the digital-to-analog converter is a repeating sequence viewable by an operator on an oscilloscope.

22. The apparatus of claim 19 wherein said control means includes means for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means at said sampling clock signal rate such that the signal produced at the output of the digital-to-analog converter is a repeating sequence representative of the signal sensed on the corresponding power carrying line.

23. The apparatus of claim 1 further including means for establishing a trigger link relationship between any two operator selected channel circuits such that a trigger detect signal produced by one channel causes a trigger detect signal to be produced in the other channel.

24. The apparatus of claim 23 wherein said control means further includes means operable in the manual mode for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means such that the signal produced at the output of the digital-to-analog converter is a repeating sequence viewable by an operator on an oscilloscope.

25. The apparatus of claim 23 wherein said control means includes means for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means at said sampling clock signal rate such that the signal produced at the output of the digital-to-analog converter is a repeating sequence representative of the signal sensed on the corresponding power carrying line.

26. The apparatus of claim 1 wherein said control means further includes means operable in the manual mode for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means such that the signal produced at the output of the digital-to-analog converter is a repeating sequence viewable by an operator on an oscilloscope.

27. The apparatus of claim 1 wherein said control means includes means for continuously cycling the digital signals stored by the memory means of the selected channel circuit to the digital-to-analog converter means at said sampling clock signal rate such that the signal produced at the output of the digital-to-analog converter is a repeating sequence representative of the signal sensed on the corresponding power carrying line.

28. The apparatus of claim 1 wherein said storage means comprises first and second magnetic tape units, the first magnetic tape unit storing successive digital signals loaded into the storage means, the control logic means sensing the condition wherein the first magnetic tape unit is fully loaded to automatically begin storing successive digital signals in said second magnetic tape unit.

29. The apparatus of claim 1 wherein the control logic means further comprises real time clock means for producing a digital time signal representative of real time and wherein the control logic means includes means for storing a digital time signal in said storage means in association with loading digital signals from a memory means into said storage means.