Internally distributed monitoring system
First Claim
1. Internal system instrumentation monitoring means for obtaining measurement data on the software/hardware operation of a data processing system having at least one CPU, a channel processor for controlling I/O of the system, and a main storage controller for controlling system main storage, the CPU having an instruction execution unit with an instruction address register for indicating the address of each instruction executed by the CPU, the monitoring means comprising:
- an instrumentation table unit (ITU) being embedded internally within the CPU in local proximity to CPU signals which may be monitored,the ITU having an instrumentation table array (ITA) that includes a plurality of entries, each entry being capable of storing an input signal to the ITA while the entry is being addressed,means for connecting a selected set of internal CPU signal lines as input signals to the ITA,addressing means for selecting a current entry in the ITA and for enabling the current entry to receive and record a current state of the input signals to the ITA,sampling signal means connected to the addressing means for providing sampling signals to the addressing means to increment the address to a next entry in the ITA so that the next entry can then receive the input signals,means for the input signals to the previously addressed entry when the sampling signal increments the address to the next entry in the ITA,wherein a collection of stored input signal states in an entry being determined by the timing of the sampling signal that disables the input signals to the entry, a previously addressed entry receiving input signals thereby becomes a ITA collected entry of stored input signals upon having its input signals disabled,instrumentation control means connected to the ITU to control when the ITU is active for recording the input signals in the ITA, in order to enable the ITA to record a statistically significant number of entries during a period of ITU measurement activity.
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Abstract
The disclosure provides an embedded hardware/software monitor for a data processing system. It embeds and distributes a plurality of instrumentation table units (ITUs) within various hardware entities in the system to collect sampled hardware signals local in the hardware entity in which the respective ITU is embedded, e.g. in each CPU, I/O processor, system controller, main storage controller, etc. Instrumentation measurement is controlled centrally in the system. Sampling of the system signals is done periodically at a low-rate relative to the CPU machine cycle rate, and the sampled signal are collected in the ITUs for instrumentation analysis. Sampling pulses are synchronously provided in all ITUs in the system. The ITU collected hardware signals are related to software controlled trace entries made in a trace table (TT) in main storage by each CPU in the system executing tracing and other predetermined instructions. An asynchronous relationship between the TT entries and the ITU entries is bridged by the intervening table, called SAT, located in storage. The SAT entries receive time-of-day (TOD) values also found in associated TT entries to relate them.
240 Citations
21 Claims
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1. Internal system instrumentation monitoring means for obtaining measurement data on the software/hardware operation of a data processing system having at least one CPU, a channel processor for controlling I/O of the system, and a main storage controller for controlling system main storage, the CPU having an instruction execution unit with an instruction address register for indicating the address of each instruction executed by the CPU, the monitoring means comprising:
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an instrumentation table unit (ITU) being embedded internally within the CPU in local proximity to CPU signals which may be monitored, the ITU having an instrumentation table array (ITA) that includes a plurality of entries, each entry being capable of storing an input signal to the ITA while the entry is being addressed, means for connecting a selected set of internal CPU signal lines as input signals to the ITA, addressing means for selecting a current entry in the ITA and for enabling the current entry to receive and record a current state of the input signals to the ITA, sampling signal means connected to the addressing means for providing sampling signals to the addressing means to increment the address to a next entry in the ITA so that the next entry can then receive the input signals, means for the input signals to the previously addressed entry when the sampling signal increments the address to the next entry in the ITA, wherein a collection of stored input signal states in an entry being determined by the timing of the sampling signal that disables the input signals to the entry, a previously addressed entry receiving input signals thereby becomes a ITA collected entry of stored input signals upon having its input signals disabled, instrumentation control means connected to the ITU to control when the ITU is active for recording the input signals in the ITA, in order to enable the ITA to record a statistically significant number of entries during a period of ITU measurement activity. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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Specification