Master clock generator for telecommunications system
First Claim
1. An onboard master clock generator for time-division multiple-access telecommunications system, comprising a voltage controlled oscillator, a phase-locked loop having a first input connected to accept the signals produced by said oscillator and a second input connected to accept a consecutive burst clock signal received from an earth station, said phase locked loop including means responding to an enable signal for detecting the phase difference between the oscillator signals and the burst clock signals, and said phase-locked loop producing a control signal for said oscillator, programmable control logic means to indicate the start and the end of each burst frame period and to produce said enable signal for controlling the phase-locked loop during each frame period, said phase-locked loop including phase comparator means connected to compare the oscillator signals and the burst signals and to produce a signal representing the phase difference between the input signals thereto, and an analog-to-digital converter controlled by sampling signals to sample the phase difference signals and to produce control signals, and a digital-to-analog converter to convert each control signal into an analog signal for controlling said oscillator.
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Accused Products
Abstract
A very stable master clock for satellites is disclosed. Time division multiple access techniques are used to permit individual earth stations to be received by the satellite in separate non-overlapping time slots. The satellite switched time division multiple access systems are compatible with the onboard satellite clock by providing a comparator control logic loop to produce a signal representing the phase difference between the onboard oscillator clock and the earth station. Control signals are generated to correct the voltage controlled oscillator onboard the satellite.
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Citations
1 Claim
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1. An onboard master clock generator for time-division multiple-access telecommunications system, comprising a voltage controlled oscillator, a phase-locked loop having a first input connected to accept the signals produced by said oscillator and a second input connected to accept a consecutive burst clock signal received from an earth station, said phase locked loop including means responding to an enable signal for detecting the phase difference between the oscillator signals and the burst clock signals, and said phase-locked loop producing a control signal for said oscillator, programmable control logic means to indicate the start and the end of each burst frame period and to produce said enable signal for controlling the phase-locked loop during each frame period, said phase-locked loop including phase comparator means connected to compare the oscillator signals and the burst signals and to produce a signal representing the phase difference between the input signals thereto, and an analog-to-digital converter controlled by sampling signals to sample the phase difference signals and to produce control signals, and a digital-to-analog converter to convert each control signal into an analog signal for controlling said oscillator.
Specification