Intrusion detecting apparatus with zone identification and with noise interference discrimination

• US 4,591,834 A
• Filed: 11/25/1983
• Issued: 05/27/1986
• Est. Priority Date: 11/25/1983
• Status: Expired due to Fees

• Current Assignee: Argus Systems Group
• Original Assignee: Argus Systems Group
• Inventors: Kyle, William F.
• Primary Examiner(s): Swann, III, Glen R.
• Application Number:
  US06/555,213
• Time in Patent Office: 914 Days
• Field of Search: 340/566, 340/518, 340/524, 340/507, 340/870.26, 340/825.13, 340/825.49, 340/534, 340/531
• US Class Current: 340/566
• CPC Class Codes: G08B 13/00 Burglar, theft or intruder alarms

Abstract

Apparatus for detecting the presence of intruders includes a plurality of sensors. The apparatus not only operates an alarm to indicate the presence of an intruder, but, also, identifies the location in which the intrusion has occurred. There are two groups of sensors at each discrete location or zone. One group of sensors detects the presence of an intruder by the activation of one or more sensors. Another group of sensors discriminates against externally generated sounds to reduce false alarms. In the preferred embodiment, both groups of sensors utilize the same cable. An intrusion detection multiplexer and a discriminator multiplexer are employed to enable the sensors of each zone respectively to be sequentially detected and identified through the same apparatus.

Claims

1. Intrusion detection apparatus comprising:

(a) a plurality of intrusion detection sensors connected to a first signal line;

(b) a plurality of discriminator sensors connected to a second signal line, said first and second signal lines being in the same cable; and

(c) means connected to said intrusion detection sensors and said discriminator sensors and responsive to the activation of any one of said intrusion detection sensors but not more than a predetermined number of said discriminator sensors for operating an alarm.

2. Intrusion detection apparatus as claimed in claim 1 wherein said means comprises a signal processor, said signal processor comprising:

(a) an intrusion detection multiplexer for detecting signals emanating from said intrusion detection sensors and sequencing signals emanating from said intrusion detection sensors through said signal processor; and

(b) a discriminator multiplexer for detecting signals emanating from said discriminator sensors and sequencing signals emanating from said discriminator sensors through said signal processor.

3. Intrusion detection apparatus as claimed in claim 2 wherein said signal processor comprises first circuit means responsive to signals from said intrusion detection multiplexer for establishing an alarm state signal, and wherein said signal processor comprises second circuit means responsive to the signals from said discriminator multiplexer for inhibiting said first circuit means from establishing an alarm state signal during the presence of a non-intruder signal.

4. An intrusion detection apparatus as claimed in claim 3 wherein said first circuit means includes a timing circuit and said second circuit means includes a timing circuit to inhibit the establishment of the alarm state signal after the cessation of a false alarm signal.

5. Intrusion detection apparatus as claimed in claim 2 wherein said signal processor comprises a matrix connected to said intrusion detection sensors and said discriminator sensors and directing the signals from activated intrusion detection sensors to said intrusion detection multiplexer and directing signals from activated discriminator sensors to said discriminator multiplexer.

6. Intrusion detection apparatus as claimed in claim 5 and comprising a second plurality of discriminator sensors connected to a third signal line, said third signal line being in the same cable as said first and second signal line, and wherein said discriminator multiplexer senses said second and third signal lines and sequences simultaneously through said signal processor signals emanating from said second and third signal lines to reduce false alarms.

7. Intrusion detection apparatus as claimed in claim 2 wherein said signal processor includes clock generating means for applying stepping pulses to said intrusion detection multiplexer and said discriminator multiplexer, and said signal processor further including means disabling said clock generating means in response to a signal from at least one of said intrusion detection sensors to stop further scanning by said intrusion detection multiplexer and said discriminator multiplexer.

8. Intrusion detection apparatus comprising:

(a) a plurality of signal lines of intrusion detection sensors;

(b) a plurality of signal lines of discriminator sensors; and

(c) means connected to said signal lines of intrusion detection sensors and said signal lines of discriminator sensors and responsive to the activation of any one of said intrusion detection sensors but not more than a predetermined number of said discriminator sensors for operating an alarm,

(d) said means comprising a signal processor,

(e) said signal processor comprising;

(1) an intrusion detection multiplexer for sensing successively said signal lines of intrusion detection sensors and advancing signals conducted over any one of said signal lines of intrusion detection sensors through said signal processor, and

(2) a discriminator multiplexer for sensing signals emanating from said discriminator sensors over said signal lines of discriminator sensors and advancing signals conducted over signals lines of discriminator sensors through said signal processor.

9. Intrusion detection apparatus as claimed in claim 8 wherein said signal processor comprises a matrix connected to said signal lines of intrusion detection sensors and said signal lines of discriminator sensors and directing the signals from activated intruder detection sensors to said intrusion detection multiplexer and directing signals from activated discriminator sensors to said discriminator multiplexer.

10. Intrusion detection apparatus as claimed in claim 9 wherein said discriminator multiplexer scans simultaneously at least two of said signal lines of discriminator sensors.

11. Intrusion detection apparatus as claimed in claim 10 wherein said signal processor includes clock generating means for applying stepping pulses to said intrusion detection multiplexer and said discriminator multiplexer for scanning in synchronism one of said signal lines of intrusion detection sensors with two of said signal lines of discriminator sensors, and said signal processor further including means disabling said clock generating means in response to a signal from at least one of said intrusion detection sensors to stop further scanning by said intrusion detection multiplexer and by said discriminator multiplexer.

12. An intrusion detection apparatus as claimed in claim 11 and further comprising a communication link connected to said signal processor over which is carried a carrier frequency modulated by a signal representing the activation of at least one of said intrusion detection sensors.

13. An intrusion detection apparatus as claimed in claim 12 wherein said communication link carries a monitoring signal.

14. An intrusion detection apparatus as claimed in claim 9 wherein said monitoring signal is a non-modulated carrier.

15. Intrusion detection apparatus as claimed in claim 8 wherein said signal processor comprises first circuit means responsive to signals from said intrusion detection multiplexer for establishing an alarm state signal, and wherein said signal processor comprises second circuit means responsive to the signals from said discriminator multiplexer for inhibiting said first circuit means from establishing an alarm state signal during the presence of a non-intruder signal.

16. An intrusion detection apparatus as claimed in claim 15 wherein said first circuit means includes a timing circuit and said second circuit means includes a timing circuit to inhibit the establishment of the alarm state signal after the cessation of a false alarm signal.

17. An intrusion detection apparatus as claimed in claim 16 wherein said signal processor comprises:

(a) a zone identification circuit for producing zone identification signals,

(b) clock generating means for applying pulses to said intrusion detection multiplexer for scanning signals over said signal lines of intrusion detection sensors and to said zone identification circuit for synchronizing zone identification signals with said intrusion detection multiplexer scanning signals over said signal lines of intrusion detection sensors, and

(c) means disabling said clock generating means in response to a signal over any one of said signal lines of intrusion detection sensors to stop further scanning by said intrusion detection multiplexer and to hold said zone identification circuit at the last zone indicating signal.

18. An intrusion detection apparatus as claimed in claim 17 and comprising means responsive to said last zone indicating signal to generate a zone indication signal at a frequency indicative of the zone of the intrusion.

19. An intrusion detection apparatus as claimed in claim 17 and comprising means responsive to said last zone indicating signal to indicate the zone of the intrusion.

20. Intrusion detection apparatus comprising:

(a) a plurality of intrusion detection sensors;

(b) a plurality of discriminator sensors; and

(c) means connected to said intrusion detection sensors and said discriminator sensors and responsive to the activation of any one of said intrusion detection sensors but not more than a predetermined number of said discriminator sensors for operating an alarm.

21. An intrusion detection apparatus as claimed in claim 20 wherein said means is responsive to the simultaneous activation of more than said predetermined number of said discriminator sensors for inhibiting the operation of the alarm.