Security device for the secure storage of sensitive data

• US 4,593,384 A
• Filed: 12/21/1984
• Issued: 06/03/1986
• Est. Priority Date: 12/21/1984
• Status: Expired due to Term

• Current Assignee: NCR Corporation
• Original Assignee: NCR Corporation
• Inventors: Kleijne, Theodoor A.
• Primary Examiner(s): Fears, Terrell W.
• Assistant Examiner(s): Miller, Guy M.
• Application Number:
  US06/684,637
• Time in Patent Office: 529 Days
• Field of Search: 365/63, 365/52, 365/244, 365/218, 307/202.1, 340/653, 340/550, 340/599, 340/521, 357/80, 235/487, 235/492
• US Class Current: 365/228
• CPC Class Codes: G06F 21/87 by means of encapsulation, e.g. for integrated circuits
• CPC Class Codes: G06F 2221/2143 Clearing memory, e.g. to prevent the data from being stolen
• CPC Class Codes: H01L 23/576 using active circuits
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 257/922 with means to prevent inspection of or tampering with an integrated circuit, e.g. "smart card", anti-tamper

Abstract

A device is disclosed for securely housing and protecting microelectronic circuitry in order to prevent external access to sensitive data stored therein. In a preferred embodiment of the invention, the device includes a ceramic housing which encases electronic circuitry. The ceramic housing is comprised of a plurality of individual parts selectively connected together, with each of the parts being comprised of a ceramic substrate and a plurality of ceramic layers disposed thereon. The electronic circuitry includes a memory for storing sensitive data therein and a tamper detection circuit. The tamper detection circuit includes a conductive path selectively provided through the plurality of ceramic layers of each of the plurality of individual parts and is responsive to any attempt to penetrate the ceramic housing which damages the conductive path for clearing the memory of any sensitive data stored therein. The tamper detection circuit further includes a low temperature sensing circuit which is responsive to a decrease in temperature in the ceramic housing below a preselected reference temperature for causing the tamper detection circuit to also clear the memory of any sensitive data stored therein.

Claims

1. A device for the secure storage of sensitive data, said device comprising:

a housing;

a memory contained within said housing for storing sensitive data therein;

low temperature sensing means contained within said housing and being responsive to a decrease in temperature in said housing below a preselected reference temperature for developing a first signal; and

means contained within said housing being responsive to said first signal for clearing said memory of any sensitive data stored therein.

2. The device of claim 1 wherein said low temperature sensing means includes:

a temperature sensitive bridge circuit for producing a first operational state when the temperature within said housing is at or above a preselected reference temperature and a second operational state when the temperature within said housing is below said preselected reference temperature; and

amplifier means responsive to said second operational state of said temperature sensitive bridge circuit for developing said first signal.

3. The device of claim 1 wherein said housing is comprised of a plurality of individual parts selectively connected together, each of said individual parts being comprised of a ceramic substrate and a plurality of ceramic layers disposed thereon, said device further including:

a first conductive path selectively provided through said plurality of ceramic layers of each of said plurality of individual parts; and

sensing means contained within said housing and being coupled to said first conductive path, said sensing means being responsive to any attempt to penetrate said housing which damages said first conductive path for generating a second signal;

said clearing means being responsive to said first signal or said second signal for clearing said memory of any sensitive data stored therein.

4. The device of claim 3 further including:

a second conductive path selectively provided through said plurality of ceramic layers of each of said plurality of individual parts, said sensing means further coupled to said second conductive path and being responsive to any attempt to penetrate said housing which damages said second conductive path for generating a third signal, said clearing means being responsive to any of said first, second or third signals for applying a fourth signal to said memory to clear said memory of any sensitive data stored therein.

5. The device of claim 4 wherein said memory includes:

a resettable shift register which is reset by said fourth signal to clear any sensitive data stored therein.

6. The device of claim 4 wherein said low temperature sensing means includes:

a temperature sensitive bridge circuit for producing a first operational state when the temperature within said housing is at or above a preselected reference temperature and a second operational state when the temperature within said housing is below said preselected reference temperature; and

amplifier means responsive to said second operational state of said temperature sensitive bridge circuit for developing said first signal.

7. A device for the secure storage of sensitive data, said device comprising:

a housing comprised of a plurality of individual parts selectively connected together, each of said parts being comprised of a substrate and a plurality of layers disposed thereon; and

electronic circuitry contained within said housing, said electronic circuitry including a memory for storing sensitive data therein and tamper detection circuit, said tamper detection circuit including a first conductive path selectively provided through said plurality of layers of each of said plurality of individual parts, said tamper detection circuit being responsive to any attempt to penetrate said housing which damages said first conductive path for clearing said memory of any sensitive data stored therein;

said tamper detection circuit further including;

sensing means coupled to said first conductive path and being responsive to damage to said first conductive path for generating a first signal;

means responsive to said first signal from said sensing means for clearing said memory of any sensitive data stored therein; and

low temperature sensing means responsive to a decrease in temperature within said housing below a preselected reference temperature for developing a second signal, said clearing means being responsive to said first signal or said second signal for applying a third signal to said memory to clear said memory of any sensitive data stored therein.

8. The device of claim 7 wherein said memory includes:

a resettable shift register which is reset by said third signal to clear any sensitive data stored therein.

9. The device of claim 7 wherein said low temperature sensing means includes:

a temperature sensitive bridge circuit for producing a first operational state when the temperature within said housing is at or above a preselected reference temperature and a second operational state when the temperature within said housing is below said preselected reference temperature; and

amplifier means responsive to said second operational state of said temperature sensitive bridge circuit for developing said second signal.

10. The device of claim 9 wherein said memory includes:

a resettable shift register which is reset by said third signal to clear any sensitive data stored therein.

11. A device for the secure storage of sensitive data, said device comprising:

a housing comprised of a plurality of individual parts selectively connected together, each of said parts being comprised of a substrate and a plurality of layers disposed thereon; and

electronic circuitry contained within said housing, said electronic circuitry including a memory for storing sensitive data therein and a tamper detection circuit, said tamper detection circuit including a first conductive path selectively provided through said plurality of layers of eachof said plurality of individual parts, said tamper detection circuit being responsive to any attempt to penetrate said housing which damages said first conductive path for clearing said memory of any sensitive data stored therein;

said tamper detection circuit further including;

a second conductive path selectively provided through said plurality of layers of each of said plurality of individual parts, said tamper detection circuit being responsive to any attempt to penetrate said housing which damages either of said first and second conductive paths for clearing said memory of any sensitive data stored therein;

a first sensing circuit coupled to said first conductive path and being responsive to damage to said first conductive path for generating a first signal;

a second sensing circuit coupled to said second conductive path and being responsive to damage to said second conductive path for generating a second signal;

clearing means responsive to said first signal or said second signal for applying a third signal to said memory to clear any sensitive data stored therein; and

a third sensing circuit responsive to a decrease in temperature in said housing below a preselected reference temperature for developing a fourth signal, said clearing means being responsive to any of said first, second and fourth signals for applying said third signal to said memory to clear said memory of any sensitive data stored therein.

12. The device of claim 11 wherein said memory includes:

a resettable shift register which reset by said third signal to clear any sensitive data stored therein.

13. The device of claim 11 wherein said third sensing circuit includes:

a temperature sensitive bridge circuit for producing a first operational state when the temperature within said housing is at or above a preselected reference temperature and a second operational state when the temperature within said housing is below said preselected reference temperature; and

amplifier means responsive to said second operational state of said temperature sensitive bridge circuit for developing said fourth signal.

14. The device of claim 13 wherein said memory includes:

a resettable shift register which is reset by said third signal to clear any sensitive data stored therein.

15. A device for the secure storage of sensitive data, said device comprising:

a housing comprised of a plurality of individual parts selectively connected together into a preselected configuration, each of said parts being comprised of a substrate and a plurality of layers disposed thereon;

a memory contained within said housing for storing sensitive data therein;

a first conductive path selectively provided through said plurality of layers of each of said plurality of individual parts;

sensing means contained within said housing and being coupled to said first conductive path, said sensing means being responsive to any attempt to penetrate said housing which damages said first conductive path for generating a first signal;

means contained within said housing being responsive to said first signal for clearing said memory of any sensitive data stored therein; and

low temperature sensing means contained within said housing and being responsive to a decrease in temperature in said housing below a preselected reference temperature for developing a second signal, said clearing means being responsive to said first signal or said second signal for applying a third signal to said memory to clear said memory of any sensitive data stored therein.

16. A device for the secure storage of sensitive data, said device comprising:

a housing comprised of a plurality of individual parts selectively connected together into a preselected configuration, each of said parts being comprised of a substrate and a plurality of layers disposed thereon;

a memory contained within said housing for storing sensitive data therein;

a first conductive path selectively provided through said plurality of layers of each of said plurality of individual parts;

sensing means contained within said housing and being coupled to said first conductive path, said sensing means being responsive to any attempt to penetrate said housing which damages said first conductive path for generating a first signal;

means contained within said housing being responsive to said first signal for clearing said memory of any sensitive data stored therein; and

a second conductive path selectively provided through said plurality of layers of each of said plurality of individual parts, said sensing means further coupled to said second conductive path and being responsive to any attempt to penetrate said housing which damages said second conductive path for generating a second signal, said clearing means being responsive to said first signal or said second signal for clearing said memory of any sensitive data stored therein.

17. The device of claim 16 wherein said sensing means includes:

a first sensing circuit coupled to said first conductive path and being responsive to damage to said first conductive path for generating said first signal; and

a second sensing circuit coupled to said second conductive path and being responsive to damage to said second conductive path for generating said second signal.

18. The device of claim 17 further including:

a third sensing circuit contained within said ceramic housing being responsive to a decrease in temperature in said ceramic housing below a preselected reference temperature for developing a third signal, said clearing means being responsive to any of said first, second and third signals for applying a fourth signal to said memory to clear said memory of any sensitive data stored therein.