Circuit for detecting keypad conditions in a microprocessor controlled telephone instrument
First Claim
1. A circuit arrangement adapted to maximize the utilization of a microprocessor associated with a telephone comprising:
- a microprocessor including a plurality of four pin ports and a serial output port;
the pins of a first port connected as an output to the circuitry of an associated telephone;
said serial output port connected to a shift register;
said shift register further including a plurality of parallel circuit outputs connected to a random access memory;
the pins of a second port connected as inputs to said random access memory;
the pins of a third port also each connected to data in-out connections of said random access memory and each pin of said third port also connected to a DTMF dialer circuit; and
one of said pins of said first port also connected to an enable input of said DTMF dialer circuit.
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Accused Products
Abstract
A technique for evaluating keypad conditions while utilizing only a minimum number of ports in a microprocessor involved in control of a telephone instrument. Because of the limited number of ports available and necessity to also evaluate conditions of mode selecting strap switches, the utilization of a reduced number of ports is highly desirable in such an enviroment. Such a reduction becomes an absolute necessity particularly in dealing in those enviroments that include random access memories, read only memories, pulse dialers, integrated circuits and liquid crystal displays. A combination of diode gating, resistive decoupling and time multiplexing techniques are used to match the input/output requirements to the available ports of a specific microprocessor.
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Citations
8 Claims
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1. A circuit arrangement adapted to maximize the utilization of a microprocessor associated with a telephone comprising:
- a microprocessor including a plurality of four pin ports and a serial output port;
the pins of a first port connected as an output to the circuitry of an associated telephone;
said serial output port connected to a shift register;
said shift register further including a plurality of parallel circuit outputs connected to a random access memory;
the pins of a second port connected as inputs to said random access memory;
the pins of a third port also each connected to data in-out connections of said random access memory and each pin of said third port also connected to a DTMF dialer circuit; and
one of said pins of said first port also connected to an enable input of said DTMF dialer circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
- a microprocessor including a plurality of four pin ports and a serial output port;
Specification