Intruder detector apparatus

• US 4,602,246 A
• Filed: 04/08/1985
• Issued: 07/22/1986
• Est. Priority Date: 02/11/1982
• Status: Expired due to Term

• Current Assignee: Garold K. Jensen
• Original Assignee: Garold K. Jensen
• Inventors: Jensen, Garold K.
• Primary Examiner(s): Crosland, Donnie L.
• Application Number:
  US06/720,581
• Time in Patent Office: 470 Days
• Field of Search: 340/506, 340/502, 340/500, 340/521, 340/517, 340/522, 340/523, 340/531, 340/533, 340/534, 340/538, 340/551, 340/552, 340/554, 340/553, 340/561, 340/562, 377/12, 377/30, 377/28, 377/118, 377/112, 179/5 R, 179/5 P, 324/78 R, 324/78 J, 324/78 F, 324/78 Z, 307/231, 307/510, 307/518-520, 307/522-524, 307/116, 307/129, 328/1, 328/5, 328/15, 328/17, 328/132, 328/138
• US Class Current: 340/521
• CPC Class Codes: G08B 19/00 Alarms responsive to two or more different undesired or abnormal conditions, e.g. burglary and fire, abnormal temperature and abnormal rate of flow
• CPC Class Codes: G08B 23/00 Alarms responsive to unspecified undesired or abnormal conditions

Abstract

Detectors (11a-d) are located at a plurality of locations and include go, no-go decision processor apparatus for subjecting outputs of the detectors (11a-d) to a go, no-go decision process. First signal generator and transmitter apparatus (12a-d) are interconnected to said go, no-go decision processor apparatus for generating and transmitting signals responsive to the output of said go, no-go decision processor apparatus, the signals being transmitted in a wave form configured to maximize differentiation from noise and interference. First data receiver apparatus (13) receives the signals from said first signal generator and transmitter apparatus (12a-d) and includes wave form recognition apparatus. A reprogrammable central processor apparatus (14) is interconnected to the data receiver apparatus (13) for providing action outputs representative of one or more actions to be taken in response to one or more signals received from the first data receiver apparatus (13). The reprogrammable central processor apparatus (14) provides for preselection of a false alarm rate based on action to be taken. The action outputs are provided to a second signal generator and transmitter apparatus (15) for transmission to a plurality of data receiver apparatus (16a-c) each interconnected to action devices (17a-c) for taking appropriate action in response to signals received from said second signal generator and transmission apparatus (15).

Claims

1. A detection device for sensing motion, comprising:

means for generating an electromagnetic field;

capacitance means associated with said generating means responsive to disturbances of said electromagnetic field;

self-excited oscillator means connected to said capacitance means and operative for providing a signal having a frequency which varies in response to disturbances in said electromagnetic field;

frequency change detector means connected to receive said variable frequency signals from said oscillator and operative to provide an output signal upon detection of changes in said frequency, and including means for suppressing output upon detection of repetitive oscillations of the frequency value; and

discriminating means connected to receive the output of said frequency change detector, and operative for providing an output signal upon occurrence of a predetermined number of outputs of said frequency change detector means within a predetermined time interval.

2. A detection device for sensing motion, comprising:

means for generating an electromagnetic field;

capacitance means associated with said generating means responsive to the disturbances of said electromagnetic field;

self-excited oscillator means connected to said capacitance means and operative for providing a signal having a frequency which varies in response to disturbances in said electromagnetic field;

frequency change detector means connected to receive said variable frequency signals from said oscillator and operative to provide an output signal upon detection of changes in said frequency, said frequency change detector means having means providing a latch pulse for marking termination of a frequency count period and means for performing a frequency count during said period, said frequency change detector means further having means for detecting oscillating frequency changes, said frequency change detector means suppressing output upon detection of an oscillating frequency and providing output upon detector of a non-oscillating frequency; and

discriminating means connected to receive the output of said frequency change detector, and operative for providing an output signal upon the occurrence of a predetermined number of outputs from said frequency change detection means within a predetermined sequence of frequency count periods.

3. A detection device in accordance with claim 2, wherein said discriminating means includes:

constant current source means connected to said frequency change detector means for receiving the output of said frequency change detector means, said constant current source means providing an output;

constant current sink means for providing an output;

storage capacitor means connected to said source means and said sink means for receiving the output of each of said means, said storage capacitor being discharged by said constant current sink means and charged by said constant current source means, said storage capacitor providing an output; and

monostable multivibrator means connected to said storage capacitor means for receiving the output of said storage capacitor means, said monostable multivibrator providing a reset signal to said storage capacitor means, said monostable multivibrator further providing an output.

4. A detection device in accordance with claim 2, wherein said discriminating means includes:

monostable multivibrator means connected to said frequency change detector means for receiving said latch pulse output from said frequency change detector means, said monostable multivibrator providing a corresponding timed output;

bilateral switch means connected to said monostable multivibrator means for receiving the timed output of said monostable multivibrator means, said bilateral switch means providing a timed output;

up-down decade counter means connected to said frequency change detector means for receiving the detection output of said frequency change detector means, said up-down decade counter means having an up count input terminal and a down count input terminal, said up-down decade counter receiving said detection output at said up count input terminal, said up-down decade counter means being connected to receive the latch pulse output of said frequency change detector means via said monostable multivibrator means and said bilateral switch means, said up-down decade counter means receiving said latch pulse output at said down count input terminal, said up-down decade counter means providing a binary coded decimal output via four output leads;

circuit means connected to said up-down decade counter means for receiving said binary coded decimal output of said up-down decade counter means, said circuit means responsive to a selected up count and providing an output in response to detection of said selected up count;

monostable multivibrator means connected to said circuit means for receiving said output responsive to said selected up count, said monostable multivibrator means being connected to said up-down decade counter means to provide a reset signal to said up-down decade counter upon receipt of said circuit means output, said monostable multivibrator means further providing an output indicative of a valid frequency change detection upon receipt of said output; and

gate means connected to said up-down decade counter means for receiving the output of said up-down decade counter means, said gate means recognizing a zero count and providing an output to said bilateral switch means to prevent further decrementing of said up-down decade counter means.

5. A frequency change detector, comprising:

frequency counter means for determining the frequency of an input signal, said frequency counter means providing an output indicative of the numerical value of said frequency;

means connected to said frequency counter means for latching a predetermined digit of said frequency value, said latching means providing an output indicative of the value of said digit;

means connected to said latching means for detecting whether said digit is oscillating in value, said detection means suppressing output if said digit is oscillating, said detection providing an output signal indicative of a frequency change if said digit is not oscillating;

whereby output from said frequency change detector is suppressed if the change in frequency detected is oscillating due to drift or other spurious oscillation.

6. A frequency change detector in accordance with claim 5 wherein said latching means includes means for converting said frequency counter output for said selected digit into binary coded decimal, and further including decimal data means for converting said binary coded decimal to decimal data and providing output thereof on ten separate output leads.

7. A frequency change detector in accordance with claim 6 wherein said detecting means includes ten sets of dual time constant means for providing dual time constant characteristics, one of said dual time constant means being connecting to each of said ten output leads from said decimal means.

8. A frequency change detector in accordance with claim 7 wherein said detecting means includes a monostable multivibrator device connected to receive the output of each of said dual time constant means, said monostable multivibrator having a predetermined trigger pulse voltage requirement, said monostable multivibrator not being triggered if said selected digit is oscillating in value.

9. A frequency change detector, comprising:

frequency counter and timing means for receiving an input signal and for counting the frequency of said input signal, said frequency counter and timing means providing an output indicative of said frequency count;

means for providing decimal data of a selected digit of said frequency count, said decimal data being provided on ten separate output leads, each lead being indicative of a decimal value zero through nine;

dual time constant means connected to each of said output leads for providing dual time constant characteristics on each of said leads, said dual time constant means being further connected to provide a common output; and

a monostable multivibrator connected to said common output of said dual time constant means, said monostable multivibrator providing an output upon being triggered by said common output.

10. A frequency change detector, comprising:

frequency counter and timing means for receiving an input signal and for counting the frequency of said signal, said frequency counter and timing means providing a multiplexed seven segment data output and further providing a demultiplexed digital output;

a monostable multivibrator connected to said frequency counter and timing means for receiving a selected demultiplexed digital output from said frequency counter and timing means, said monostable multivibrator providing a timed latch output signal;

seven segment to binary coded decimal converter means connected to said frequency counter and timing means for receiving said seven segment data output, said binary coded decimal converter means being connected to said monostable multivibrator for receiving said time latch output signal, said converter means providing a binary coded decimal output;

binary coded decimal to decimal converter means connected to said seven segment to binary coded decimal means for receiving said binary coded decimal output from said binary coded decimal converter means, said decimal converter means having ten separate output leads, each of said leads being indicative of a particular decimal value zero through nine;

separate dual time constant means connected to each of said output leads from said decimal converter means for providing of dual timed constant effect, each of said dual timed constant means being further connected to provide a common output; and

monostable multivibrator connected to said dual timed constant means for receiving the output of each dual timed constant means;

whereby said frequency change detector differentiates between non-oscillating frequency changes and somewhat oscillating frequency changes due to drift or other spurious causes.