Data processing system with error correction

• US 4,604,748 A
• Filed: 01/03/1984
• Issued: 08/05/1986
• Est. Priority Date: 01/24/1983
• Status: Expired due to Fees

• Current Assignee: Tokyo Shibaura Denki Kabushiki Kaisha (Toshiba Corporation)
• Original Assignee: Tokyo Shibaura Denki Kabushiki Kaisha (Toshiba Corporation)
• Inventors: Sato, Fumitaka
• Primary Examiner(s): Atkinson, Charles E.
• Application Number:
  US06/567,912
• Time in Patent Office: 945 Days
• Field of Search: 371/37, 371/38, 371/39, 371/40, 371/68, 360/38.1, 360/53
• US Class Current: 714/704
• CPC Class Codes: G06F 11/1008 in individual solid state devices G06F11/1004 takes precedence
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems

Abstract

In a picture data record/playback system, picture data and code data is recorded onto two fields of a record, which fields constitute a single picture in an optical disk unit. When the picture data is subjected to a cyclic redundancy check and an error is detected, the first error correction, for which the bit error rate of error correction is not too high, is applied to the picture data. The code data is doubly recorded onto the optical disk unit. Both items of recorded data are compared to each other. When such items are not coincident with each other, the CRC check is applied to both items of data which are doubly recorded. The valid code data is then selected. Further, when an error is detected, a CPU executes a second error correction, under program control, of which the bit error rate for error correction is not too low.

Claims

1. A data processing system designed to handle a large amount of high-redundant data which allows for a low frequency of occurrence of errors, and a small amount of low-redundant data which allows for a very low frequency of occurrence of errors, which data processing system has a memory device with a large capacity for storing high-redundant and low-redundant data at an insufficiently low frequency of error, said data processing system comprising:

first error correction means for correcting the errors of said high- and low-redundant data, so that said high- and low-redundant data may be set within a tolerable error range when said high- and low-redundant data are read out from or written into said memory device; and

second error correction means for double recording the low redundant data onto said memory device and for executing error correction on each item of the double-recorded low redundant data.

2. A data processing system according to claim 1, wherein said second correction means comprises:

comparing means for comparing the double-recorded data; and

means for performing a cyclic redundancy check on each item of the double-recorded low-redundant data, when the results of the comparison indicate noncoincidence between said double-recorded data.

3. A data processing system according to claim 1, wherein said second correcting means doubly records said low-redundant data in said memory device, reads both of said doubly recorded values from said memory devices, and performs an error correction routine on each item of said doubly recorded read values.

4. In a data processing system designed to handle a large amount of high-redundant data which allows for a low frequency of occurrence of errors, and a small amount of low-redundant data which allows for a very low frequency of occurrence of errors, which data processing system has a memory device with a large capacity for storing high-redundant and low-redundant data at an insufficiently low frequency of error, a method of processing data comprising the steps of:

(1) correcting the errors of said high- and low-redundant data so that said high- and low-redundant data may be set within a tolerable error range when said high- and low redundant data are read out from or written into said memory device;

(2) recording the low-redundant data onto said memory device twice; and

(3) executing error correction on each item of the double recorded low-redundant data recorded by said recording step (2).

5. A method as in claim 4 wherein said executing step (3) includes the steps of:

reading both of the data recorded by said recording step (2);

comparing the double-recorded data; and

performing a cyclic redundancy check on each item of the double recorded low-redundant data when the results of the comparison performed by said comparing step indicate noncoincidence between said double-recorded data.

6. A system for processing digital values comprising:

memory means for storing digital values;

first error checking means for performing an error checking routine on a first digital value, said routine producing a first result in response to said first value;

means for storing said first value together with said first result in said memory means;

means for reading said stored first value and stored first result from said memory means;

second error checking means for performing said error checking routine on said first value read by said reading means, said routine producing a second result in response to said read first value; and

processing means for determining if said first result read by said reading means is equal to said second result produced by said second error checking means, and for selecting said read first value in response to a determination that said read first result and said second result are equal.

7. A system as in claim 6 wherein said processing means also compares said first value and first result read by said reading means with a reference value, and selects said read first value when said read first value and first result correspond to said reference value.

8. A system for processing digital values comprising:

means for receiving a first digital value to be processed;

means for copying said first digital value to obtain a second digital value;

first error checking means for performing an error checking routine on said first digital value, said routine producing a first result in response to said first value, and for performing said error checking routine on said second digital value, said routine producing a second result in response to said second value;

memory means for storing digital values;

means for writing said first digital value together with said first result in said memory means and for writing said second digital value together with said second result in said memory means;

means for reading said stored first digital value and stored first result, and for reading said stored second digital value and stored second result from said memory means; and

control means for;

determining if the first value and first result read by said reading means are equal to the second value and second result, respectively, read by said reading means,

selecting one of said read first value and said read second value if said read first value and read first result are equal to said read second value and read second result, respectively, and

in response to a determination that said read first value and read first result are not equal to said read second value and read second result;

(a) performing an error checking routine on said read first value, said routine producing a third result in response to said read first value,

(b) determining if said read first result and said third result are equal,

(c) if said read first result and said third result are equal, selecting said first read value,

(d) performing an error checking routine on said read second value, said routine producing a fourth result in response to said read second value,

(e) determining if said read second result and said fourth result are equal, and

(f) in response to a determination that said read second result and said fourth result are equal, selecting said read second value.

9. A method for processing digital values comprising the steps of:

(1) performing an error checking routine on a first digital value, said routine producing a first result in response to said first value;

(2) storing said first value together with said first result in a memory device;

(3) reading said stored first value and said first result from said memory device;

(4) performing said error checking routine on said first value read by said reading step (3), said routine producing a second result in response to said read first value;

(5) determining if said first result read by said reading step (3) is equal to said second result produced by said performing step (4); and

(6) selecting said first value read by said reading step (3) if said determining step (5) determines said read first result is equal to said second result.

10. A method as in claim 9 wherein:

said method further comprises the steps of comparing said first value and first result read by said reading step (3) with a reference value, and selecting said read first value if said read first value and first result are equal to said reference value; and

said performing step (4), determining step (5) and selecting step (6) are performed only if said comparing step determines said read first value and first result do not correspond to said reference value.

11. A method for processing digital values comprising the steps of:

(1) receiving a first digital value;

(2) copying said first digital value to obtain a second digital value;

(3) performing an error checking routine on said first digital value, said routine producing a first result in response to said first value;

(4) storing said first digital value together with said first result in a memory device;

(5) performing said error checking routine on said second digital value, said routine producing a second result in response to said second value;

(6) storing said second digital value together with said second result in said memory device;

(7) reading said first digital value and first result stored by said storing step (4) and said second digital value and second result stored by said storing step (6) from said memory device;

(8) determining if the first value and first result read by said reading step (7) correspond to the second value and second result, respectively, read by said reading step (7);

(9) if said determining step (8) determines said read first value and read first result correspond to said read second value and read second result, selecting one of said read first value and said read second value; and

(10) if said determining step (8) determines said read first value and first result do not correspond to said read second value and read second result, performing the following steps;

(a) performing said error checking routine on said read first value, said routine producing a third result in response to said read first value,

(b) determining if said read first result and said third result correspond, and

(c) if said determining step (b) determines said read first result and said third result correspond, selecting said read first value.

12. A method as in claim 11 wherein said performing step (10) further includes the steps of:

(d) performing said error checking routine on said read second value, said routine producing a fourth result in response to said read second value;

(e) determining if said read second result and said fourth result correspond, and

(f) if said determining step (e) determines said read second result and said fourth result correspond, selecting said read second value.