Lead bonding of integrated circuit chips

• US 4,605,833 A
• Filed: 03/15/1984
• Issued: 08/12/1986
• Est. Priority Date: 03/15/1984
• Status: Expired due to Fees

• Current Assignee: Westinghouse Electric Corporation (Paramount Global (f/k/a ViacomCBS Inc.))
• Original Assignee: Westinghouse Electric Corporation (Paramount Global (f/k/a ViacomCBS Inc.))
• Inventors: Lindberg, Frank A.
• Primary Examiner(s): Shaw, Clifford C.
• Application Number:
  US06/589,912
• Time in Patent Office: 880 Days
• Field of Search: 219/56.21, 219/56.22, 219/109, 219/110, 219/86.51, 219/85 F, 228/179, 228/180 A
• US Class Current: 219/56.22
• CPC Class Codes: B23K 20/023 Thermo-compression bonding
• CPC Class Codes: H01L 24/80 Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/14 Integrated circuits

Abstract

A method and apparatus for bonding a plurality of metallic leads to pads of a chip where the force of a thermode, which is placed in contact with the chip is increased at a first rate to a maximum force less than required to effect the bonding over a time period required to bring the metallic leads and pads close to bonding temperature, and then increasing the uniform force at a rate greater than the first rate to a force sufficient to effect the bonding. The apparatus includes a chip holder arrangement that is mounted to automatically align to the plane of the bonding thermode to provide for uniform deformities to the bump portions of the bond.

Claims

1. A method of gang bonding metallic leads to metallic pads of an integrated circuit chip to minimize chip fracture, comprising the steps of

placing the leads and pads in bonding position beneath a thermode, said thermode being at a selected temperature above the actual bonding temperature of the metallic leads and pads, and said leads and pads being substantially at ambient temperature,

placing the thermode in physical contact with the leads,

increasing at a first selected rate the contact force of the thermode to a selected maximum force less than that required to effect the bond, said first rate being selected as a function of the temperature response of the chip to the thermode to raise the temperature of the leads and pads to a selected fraction of the bonding temperature,

increasing at a second selected rate that is substantially greater than the first selected rate the contact force of the thermode to a maximum pressure sufficient to effect the bond, and

withdrawing the thermode out of physical contact with the bonded leads and pads after a predetermined length of time sufficient to effect the bond.

2. A method according to claim 1 wherein the first rate is selected to raise the temperature of the chip to approximately 80% of its maximum temperature prior to the application of the force at the second selected rate.

3. An apparatus for gang bonding metallic leads to metallic pads of an integrated circuit chip, comprising

a thermode having a plane surface for physically contacting the leads to be bonded

a chip carrier assembly including a platform having a surface for supporting the chip to be bonded, a compliant insulating member mounted on the surface of the platform, said insulating member having a plane outer surface and a thermocouple mounted on said plane outer surface to detect the temperature of chip mounted thereon

a means for pivotally mounting the platform in position to cause the thermode to apply uniform force to a chip supported by the platform surface at times when the thermode is in forceful contact with the chip positioned substantially centrally over the pivotal means,

first means connected to the thermode operative to place the thermode in physical engagement with a chip on the plane surface of the carrier,

second means for increasing the force of the thermode at a first selected rate to a selected maximum insufficient to effect the bond, third means to select said rate as a function of the temperature response of the chip to the thermode to raise the temperature of the leads and pads to a selected fraction of the bonding temperature and

fourth means for increasing the force of the thermode at a second rate to a selected maximum to effect the bond.

4. An apparatus according to claim 3 wherein the platform of the chip carrier assembly includes a centrally positioned conical recess in the surface opposite the surface for supporting the chip and wherein the means for pivotally mounting the platform comprises a vertically mounted rod having a pointed end engaging the platform in the conical recess,

said assembly comprising a base member having a peripheral shoulder, a strainable member mounted at its edges on the shoulder, said vertical rod being mounted at its other end on said strainable member centrally of its edges, and a strain gauge to measure the force of the thermode against the platform.

5. An apparatus according to claim 3 further comprising means mounted on the chip carrier assembly to detect the cracking of a chip during bonding.

6. In a method of gang bonding metallic leads to pads of an integrated circuit chip by compressing the leads and pads of the chip with a heated thermode, the improvement of placing the heated thermode in physical contact with the leads and pads that are at ambient temperature, and increasing the force of the thermode against the leads with at least two different rates of force sequentially, the first applied increase being at a lower rate than a subsequent applied increase said first rate of increase being selected as a function of the temperature response of the chip to the thermode to raise the temperature of the leads and pads to a selected fraction of the bonding temperature, and said subsequent rate being selected to effect the bond, thereby minimizing chip fracture.