Image processing-system
First Claim
1. A combination circuit for performing feature-identification and histogram functions on the output of an imaging device that produces sequences of digital level signals representing the intensity levels of picture elements in an image and clock signals indicating when a new picture element is represented by the current level signal, the combination circuit comprising:
- A. a programmable encoder, operable by application of programming signals thereto to establish a correspondence between digital level signals and digital code signals, for receiving level signals and producing in response the corresponding code signals, each code signal indicating whether a picture element whose intensity is represented by the corresponding level signal has a selected feature when the combination circuit performs feature identification and indicating the sorting bin to which a picture element whose intensity is represented by the corresponding level signal belongs when the combination circuit performs the histogram function;
B. a counter connected to receive the code signals, operable by application of load signals thereto to store the values of the code signals, and operable by application of count signals thereto to increment the value stored therein, for producing counter signals representing the stored value;
C. a memory circuit including a plurality of memory locations, connected to receive the counter signals, operable by application of write signals thereto to store in memory locations indicated by the counter signals the values of data signals applied thereto, and operable by application of read signals thereto to produce memory signals having the values stored in the memory locations indicated by the counter signals;
D. an increment circuit for storing an index value, the increment circuit being operable by application of mode-select signals thereto to assume one of a feature-identification state and a histogram state, connected to receive the memory signals and to apply data signals to the memory circuit, operable in the feature-identification state by application of increment signals thereto to increment the index value stored therein and produce data signals having the resultant value, and operable in the histogram state by application of increment signals thereto to increment the values of the received memory signals and produce data signals having the resultant values;
E. a control circuit selectively operable in a feature-identification mode and in a histogram mode, connected for reception of the clock signals and for application of load and count signals to the counter, read and write signals to the memory circuit, and mode-select and increment signals to the increment circuit, for,i. in the feature-identification mode, applying mode-select signals to the increment circuit to cause it to assume its feature-identification mode, applying increment signals to the increment circuit in response to the clock signals to cause it to apply data signals to the memory that indicate the position of the current picture element, receiving code signals from the encoder, applying a count signal to the counter whenever the code signal indicates that the level signal has the intended feature so that the counter signal represents the address of the next location in the memory, and operating the memory to cause it to store in the location indicated by the counter signal the value represented by the data signal from the increment circuit, the memory thereby storing in successive locations the positions of picture elements having the intended feature, andii. in the histogram mode, applying mode-select signals to the increment circuit to cause it to assume its histogram state, applying load signals to the counter circuit in response to the clock signals to cause it to store the code signals and produce counter signals indicating the bins to which the levels indicated by the level signals belong, operating the memory to cause it to produce memory signals representing the current value in the memory location addressed by the counter signals, applying increment signals to the increment circuit to cause it to increment the value represented by the memory signals and apply data signals to the memory that represent the resultant value, and applying write signals to the memory to cause it to store the incremented value in the location addressed by the counter signals, the memory thereby storing in memory locations representing sorting bins the number of picture elements that belong to those bins.
2 Assignments
0 Petitions
Accused Products
Abstract
Level data on an output line (24) carrying the digitized output of a video camera and analog-to-digital converter (12) is processed by a combination circuit (10) to store in an acquisition memory (16) the results of a feature-identification or histogram operation. In a histogram operation, the memory locations of the acquistion memory (16) represent the bins into which the levels represented by the level data are sorted, and the contents of those locations indicate the number of picture elements whose levels fall in those bins. In feature identification, the contents of successive memory locations in the acquistion memory (16) contain the positions of those picture elements whose levels have a selected feature. Common circuitry performs both the histogram and feature-identification functions. To perform the histogram function, a counter (39), whose output provides the address for the acquisition memory (16), is operated to load the output of a look-up-table memory (22), which acts as an encoder to indicate the bin into which the level represented by the level signal belongs. An increment circuit (52) is then operated to read the contents of that location in the acquisition memory (16), increment it, and return the incremented value to the specified memory location. For feature identification, the contents of the look-up table (22) indicate whether the levels represented by the level signals have the selected features. A control circuit (30) monitors the output of the look-up-table memory and clocks the counter (39) whenever the selected feature is encountered. This changes the address for the random-access memory (16) to that of the next location in memory, and the increment circuit (52), which is incremented on the occurrence of every picture element to keep track of picture-element location, writes the position of the picture element having the selected feature into the next location in the random-access memory (16).
70 Citations
2 Claims
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1. A combination circuit for performing feature-identification and histogram functions on the output of an imaging device that produces sequences of digital level signals representing the intensity levels of picture elements in an image and clock signals indicating when a new picture element is represented by the current level signal, the combination circuit comprising:
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A. a programmable encoder, operable by application of programming signals thereto to establish a correspondence between digital level signals and digital code signals, for receiving level signals and producing in response the corresponding code signals, each code signal indicating whether a picture element whose intensity is represented by the corresponding level signal has a selected feature when the combination circuit performs feature identification and indicating the sorting bin to which a picture element whose intensity is represented by the corresponding level signal belongs when the combination circuit performs the histogram function; B. a counter connected to receive the code signals, operable by application of load signals thereto to store the values of the code signals, and operable by application of count signals thereto to increment the value stored therein, for producing counter signals representing the stored value; C. a memory circuit including a plurality of memory locations, connected to receive the counter signals, operable by application of write signals thereto to store in memory locations indicated by the counter signals the values of data signals applied thereto, and operable by application of read signals thereto to produce memory signals having the values stored in the memory locations indicated by the counter signals; D. an increment circuit for storing an index value, the increment circuit being operable by application of mode-select signals thereto to assume one of a feature-identification state and a histogram state, connected to receive the memory signals and to apply data signals to the memory circuit, operable in the feature-identification state by application of increment signals thereto to increment the index value stored therein and produce data signals having the resultant value, and operable in the histogram state by application of increment signals thereto to increment the values of the received memory signals and produce data signals having the resultant values; E. a control circuit selectively operable in a feature-identification mode and in a histogram mode, connected for reception of the clock signals and for application of load and count signals to the counter, read and write signals to the memory circuit, and mode-select and increment signals to the increment circuit, for, i. in the feature-identification mode, applying mode-select signals to the increment circuit to cause it to assume its feature-identification mode, applying increment signals to the increment circuit in response to the clock signals to cause it to apply data signals to the memory that indicate the position of the current picture element, receiving code signals from the encoder, applying a count signal to the counter whenever the code signal indicates that the level signal has the intended feature so that the counter signal represents the address of the next location in the memory, and operating the memory to cause it to store in the location indicated by the counter signal the value represented by the data signal from the increment circuit, the memory thereby storing in successive locations the positions of picture elements having the intended feature, and ii. in the histogram mode, applying mode-select signals to the increment circuit to cause it to assume its histogram state, applying load signals to the counter circuit in response to the clock signals to cause it to store the code signals and produce counter signals indicating the bins to which the levels indicated by the level signals belong, operating the memory to cause it to produce memory signals representing the current value in the memory location addressed by the counter signals, applying increment signals to the increment circuit to cause it to increment the value represented by the memory signals and apply data signals to the memory that represent the resultant value, and applying write signals to the memory to cause it to store the incremented value in the location addressed by the counter signals, the memory thereby storing in memory locations representing sorting bins the number of picture elements that belong to those bins. - View Dependent Claims (2)
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Specification