Data communication interconnect device

• US 4,607,170 A
• Filed: 03/01/1985
• Issued: 08/19/1986
• Est. Priority Date: 03/01/1985
• Status: Expired due to Fees

• Current Assignee: Digitel LLC
• Original Assignee: Digitel LLC
• Inventors: Wickman, Miles X.
• Primary Examiner(s): Shoop, Jr., William M.
• Assistant Examiner(s): NOT, DEFINED
• Application Number:
  US06/707,456
• Time in Patent Office: 536 Days
• Field of Search: 307/147, 307/89, 375/36, 375/37, 375/38, 339/147 P
• US Class Current: 307/147
• CPC Class Codes: H04L 12/00 Data switching networks interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units G06F13/00

Abstract

A unitary interconnection device for interconnecting digital data handling equipment which comprises an RS-232C type interface that includes a pair of pin connectors having a housing and multiple pins and a multiple conductor cable interconnecting the pins in the connectors, and an active signal circuit enclosed within the housing of one of the connectors and connected to pins in the connectors, wherein the signal circuit includes means for generating a time or clock signal for timing or clocking the flow of data signals through the interconnection device and a diode-capacitor network for providing power to the timing or clock signal generating means.

Claims

1. A unitary interconnection device for interconnecting digital data handling equipment comprising a pair of connectors each having multiple terminal connection means, a multiple conductor cable connecting said connectors, and an active signal circuit connected to said terminal connection means, said active signal circuit including means for generating a timer or clock signals for timing or clocking the flow of data signals through said interconnection device and a diode-capacitor network for providing power to said timing or clock signal generating means.

2. A unitary interconnection device according to claim 1 wherein said connectors include housings and said active signal circuit is incorporated within one of said connector housings.

3. A unitary interconnection device according to claim 1 or claim 2 wherein said active signal circuit includes a CMOS astable multivibrator controlling bipolar transistor drivers to provide said timer or clock signals.

4. A unitary interconnection device for interconnecting digital data handling equipment comprising an RS-232C type interface which includes a pair of pin connectors each having multiple pins and a housing, a multiple conductor cable interconnecting pins in said connectors, and an active signal circuit enclosed within the housing of one of said connectors and connected to pins in said connectors, said active signal circuit including means for generating a time or clock signal for timing or clocking the flow of data signals through said interconnection device and a diode-capacitor network for providing power to said timing or clock signal generating means.

5. A unitary interconnection device according to claim 4 wherein said active signal circuit includes a CMOS astable multivibrator controlling bipolar transistor drivers to provide said time or clock signal.

6. A unitary interconnection device according to claim 5 wherein said connectors include DB-25 type connectors and said diode-capacitor network includes a multiplicity of diodes having one terminal thereof connected to pins 4, 5, 6, 8 and 20 of each of said connectors, said diode-capacitor network including a capacitor having one terminal thereof connected to the other terminals of said diodes and the other terminal thereof connected to pin 7 of each of said connectors, said active signal circuit including a CMOS astable multivibrator controlling bipolar transistor drivers connected through capacitor means to pins 15 and 17 of said connectors.

7. A unitary interconnection device according to claim 6 wherein said last named capacitor means includes a pair of capacitors having one terminal thereof connected to a common point in the circuit of said bipolar transistors with one of said capacitors having its other terminal connected to pin 15 of said connectors and the other of said capacitors having its other terminal connected to pin 17 of said connectors.