Frequency hopping data communication system

• US 4,612,652 A
• Filed: 10/19/1984
• Issued: 09/16/1986
• Est. Priority Date: 10/19/1984
• Status: Expired due to Term

• Current Assignee: ITT Corporation (ITT, Inc.)
• Original Assignee: ITT Corporation (ITT, Inc.)
• Inventors: Kadin, Joseph
• Primary Examiner(s): Safourek, Benedict V.
• Application Number:
  US06/662,924
• Time in Patent Office: 697 Days
• Field of Search: 375/1, 375/2.1, 375/40, 375/48, 375/54, 375/58, 375/62, 375/89, 375/115, 375/45, 375/51, 364/717, 331/78, 367/39, 343/5 PN, 455/27, 455/29, 178/22.01, 370/18, 370/19, 370/21, 370/107
• US Class Current: 375/134
• CPC Class Codes: H04B 1/713 using frequency hopping

Abstract

An improved frequency hopped data communication system with a random transmission of mark and space frequency over the transmission bandwidth to provide independent frequency hopping of the mark and space frequency is provided in the system which is particularly immune to repeater jamming. Only one frequency is transmitted at a time upon selection on a bit instant by a pseudo-noise code generator. The location of the mark and space frequency is randomly chosen, however, the location is known at the transmitter and the repeater by appropriate synchronization equipment.

Claims

1. A frequency hopping data communication system having a random location of mark and space frequencies over a transmission bandwidth, comprising:

first means responsive to a first clock signal having a pedetermined bit rate to produce identical first and second pseudo-noise code streams time displaced with respect to each other;

second means coupled to said first means, said second means being responsive to binary data signals having said predetermined bit rate and said first and second code streams to provide a modulated signal for conveying said data signals, said modulated signal having different randomly occurring frequencies representing both the binary conditions of said data signals and the random spacing between said randomly occurring frequencies representing each of said binary conditions of said data signals such that mark and space frequencies are frequency hopped independently;

third means coupled to said second means to receive said modulated signal and to separate said randomly occurring frequencies representing each of said binary conditions from said received modulated signal;

fourth means coupled to said third means to recover said data signals from said separated, received modulated signals; and

fifth means coupled to said third means and said fourth means to synchronize said third means to said received modulated signal.

2. A system according to claim 1, wherein

said first means includes

first pseudo-noise code generator having a pair of taps disposed to provide said first and second code streams time displaced with respect to each other.

3. A system according to claim 2, wherein

said second means includes

switching means coupled to said first code generator responsive to said data signals to couple said first code stream to its output upon each occurrence of one of said binary conditions and to couple said second code stream to its output upon each occurrence of the other of said binary conditions,

a first microprocessor coupled to said output of said switching means, said first microprocessor having a table of values each of which represents a different one of said different random frequencies, said first microprocessor responding to said first and second code streams to sequentially couple predetermined ones of said values to its output, and

frequency generating means coupled to said output of said first microprocessor responsive to said predetermined ones of said values to provide said different randomly occurring frequencies for both of said binary conditions.

4. A system according to claim 3, wherein

said third means includes

a second pseudo-noise generator having a pair of taps disposed to provide third and fourth pseudo-noise code streams identical with said first and second code streams,

a second microprocessor coupled to said second code generator, said second microprocessor having said table of values and responding to said third and fourth code streams to couple values representing said randomly occurring frequencies representing said one of said binary conditions to a first output and to couple values representing said randomly occurring frequencies representing said other of said binary conditions to a second output,

a first frequency responsive means coupled to said second means and said first output of said second microprocessor to separate said randomly occurring frequencies representing said one of said binary conditions from said randomly occurring frequencies representing both of said binary conditions, and

a second frequency responsive means coupled to said second means and said second output of said second microprocessor to separate said randomly occurring frequencies representing said other of said binary conditions from said randomly occurring frequencies representing both of said binary conditions.

5. A system according to claim 4, wherein

said fourth means includes

a first power measuring and integrating means coupled to said first frequency responsive means to provide a power output signal indicating the power of frequencies passed by said first frequency responsive means,

a second power measuring and integrating means coupled to said second frequency responsive means to provide a power output signal indicating the power of frequencies passed by said second frequency responsive means, and

a two amplitude level threshold maximum likelihood detector coupled to said first and second power measuring and integrating means to recover said data signal.

6. A system according to claim 5, wherein

said fifth means includes

synchronization acquisition means coupled to the output of said maximum likelihood detector and said second code generator responsive to a second clock signal having said predetermined bit rate to synchronize said third and fourth code streams with said received modulated signal.

7. A frequency hopping data communication transmitter for transmitting binary data having a random location of mark and space frequencies over a transmission bandwidth, comprising:

first means responsive to a clock signal having a predetermined bit rate to produce identical first and second pseudo-noise code streams time displaced with respect to each other; and

second means coupled to said first means, said second means being responsive to binary data signals having said predetermined bit rate and said first and second code streams to provide a modulated signal for conveying said data signals, said modulated signal having different randomly occurring frequenices representing both binary conditions of said data signals and random spacing between said randomly occurring frequencies representing each of said binary conditions of said data signals such that mark and space frequencies are frequency hopped independently.

8. A transmitter according to claim 7, wherein

said first means includes

a pseudo-noise code generator having a pair of taps disposed to provide said first and second code streams time displaced with respect to each other.

9. A transmitter according to claim 8, wherein

said second means includes

switching means coupled to said code generator responsive to said data signals to couple said first code stream to its output upon each occurrence of one of said binary conditions and to couple said second code stream to its output upon each occurrence of the other of said binary conditons,

a microprocessor coupled to said output of said switching means, said microprocessor having a table of values each of which represents a different one of said different random frequencies, said microprocessor responding to said first and second code streams to sequentially couple predetermined ones of said values to its output, and

frequency generating means coupled to said output of said microprocessor responsive to said predetermined ones of said values to provide said different randomly occurring frequencies for both of said binary conditions.

10. A transmitter according to claim 7, wherein

said second means includes

switching means coupled to said first means responsive to said data signals to couple said first code stream to its output upon each occurrence of one of said binary conditions and to couple said second code stream to its output upon each occurrence of the other of said binary conditions,

a microprocessor coupled to said output of said switching means, said microprocessor having a table of values each of which represents a different one of said different random frequenices, said microprocessor responding to said first and second code streams to sequentially couple predetermined ones of said values to its output, and

frequency generating means coupled to said output of said microprocessor responsive to said predetermined ones of said values to provide said different randomly occurring frequencies for both said binary conditions.

11. A frequency hopping data communication receiver for receiving binary data signals having a random location of mark and space frequencies over a transmission bandwidth, comprising:

first means to receive a transmitted signal conveying binary data signals having a predetermined bit rate by means of diferent randomly occurring frequencies representing both binary conditions of said data signals with said randomly occurring frequencies representing each of said binary conditions having random spacing therebetween;

second means coupled to said first means to separate said randomly occurring frequencies representing each of said binary conditions from said received transmitted signal;

third means coupled to said second means to recover said data signals from said separated, received transmitted signals such that independently frequency hopped mark and space signals are recovered; and

fourth means coupled to said second means and said third means to synchronize said second means to said received transmitted signal.

12. A system according to claim 11, wherein

said second means includes

a pseudo-noise code generator having a pair of taps disposed to provide first and second pseudo-noise code streams time displaced with respect to each other,

a microprocessor coupled to said code generator, said microprocessor having a table of values each of which represents a different one of said different random frequencies, said microprocessor responding to said first and second code streams to couple values representing said randomly occurring frequencies representing said one of said binary condition to a first output and to couple values representing said other of said binary condition to a second output,

a first frequency responsive means coupled to said first means and said first output of said microprocessor to separate said randomly occurring frequencies representing said one of said binary conditions from said randomly occurring frequencies representing both of said binary conditions, and

a second frequency responsive means coupled to said first means and said second output of said microprocessor to separate said randomly occurring frequencies representing said other of said binary conditions from said randomly occurring frequencies representing both of said binary conditions.

13. A system according to claim 12, wherein

said third means includes

a first power measuring and integrating means coupled to said first frequency responsive means to provide a power output signal indicating the power of frequencies passed by said first frequency responsive means,

a second power measuring and integrating means coupled to said second frequency responsive means to provide a power output signal indicating the power of frequencies passed by said second frequency responsive means, and

a two amplitude level threshold maximum likelihood detector coupled to said first and second power measuring and integrating means to recover said data signals.

14. A system according to claim 13, wherein

said fourth means includes

synchronization acquistion means coupled to the output of said maximum likelihood detector and said code generator responsive to a clock signal having said predetermined bit rate to synchronize said first and second code streams with said received transmitted signal.