Digital data decoder and method

• US 4,613,973 A
• Filed: 06/20/1985
• Issued: 09/23/1986
• Est. Priority Date: 06/20/1985
• Status: Expired due to Term

• Current Assignee: HK Systems Incorporated (KION GROUP AG)
• Original Assignee: Eaton-Kenway Incorporated
• Inventors: Dahl, Warren J.
• Primary Examiner(s): Griffin, Robert L.
• Assistant Examiner(s): Chin, Stephen
• Application Number:
  US06/746,695
• Time in Patent Office: 460 Days
• Field of Search: 375/37, 375/97, 328/28, 328/31, 328/57, 328/150, 307/106, 307/261, 307/268, 307/360
• US Class Current: 375/259
• CPC Class Codes: H04L 25/069 by detecting edges or zero crossings
• CPC Class Codes: H04L 27/00 Modulated-carrier systems

Abstract

A system, including methods and apparatus, requiring digital communication between two devices using radio frequency communications to provide the link. Apparatus for decoding a digital data stream is provided, which data stream has been imposed on a base band signal where the rate of data transmission is as high as twice the frequency of the base band signal. A differential amplifier is employed to recognize the beginning and end of a segment of a wave cycle which represents a digital bit.

Claims

1. Apparatus for communicating digital data by radio frequency comprising:

first site means generating digital data;

second site means, remote from the first site means, utilizing digital data corresponding to the digital data of the first site means;

the first site means comprising radio frequency transmitter means superimposing the digital data from the first site means upon a carrier waveform to create and transmit a composite sinusoidal wave form containing said digital data;

receiver means comprising the second site means remote from the radio frequency transmitter means receiving and processing said composite sinusoidal waveform;

said receiver means comprising means which demodulate a base band signal from the composite waveform;

means to which the base band signal is communicated, said last mentioned means creating positive and negative voltage spikes each time the base band signal goes positive and negative, respectively;

means at first and second comparator sites to which said voltage spikes are communicated;

means at each comparator site comparing the voltage of said spikes to a predetermined voltage level, the comparison at the two sites being of opposite polarity, respectively;

means at each comparator site normally issuing a constant known voltage signal and means interrupting said constant voltage signal when any said voltage spike exceeds the predetermined voltage level, either in the positive or in the negative, depending on the site;

means which receive the two interrupted voltage signals and combine the two interrupted voltage signals into a single output digital signal.

2. Apparatus according to claim 1 wherein the receive means comprise means which issue a constant voltage at each interruption of the first interrupted voltage signal and means which produce zero voltage at each interruption of the second interrupted voltage signal.

3. Apparatus according to claim 1 wherein the receive means comprise means producing a data transmission rate substantially equal to twice the frequency of the base band signal.

4. Apparatus according to claim 3 wherein the demodulating means comprise means which produce a base band signal having a frequency of on the order of 4800 Hz and wherein the producing means comprise means which generate an output data transmission rate of on the order of 9600 BAUD.

5. Apparatus for producing square waveforms corresponding to sinusoidal input waveforms comprising:

a source of sinusoidal waveforms;

means to which the sinusoidal waveforms are communicated, said means creating positive and negative voltage spikes each time the sinusoidal waveform goes positive and negative, respectively;

means at first and second comparator sites to which said voltage spikes are communicated;

means at each comparator site comparing the voltage of said spikes to a predetermined voltage level, the comparison at the two sites being of opposite polarity, respectively;

means at each comparator site normally issuing a constant known voltage signal and means interrupting said constant voltage signal when the voltage spike exceeds the predetermined voltage level, either in the positive or in the negative, depending on the site; and

means which receive the two interrupted voltage signals and integrate the two interrupted voltage signals into a single output square wave signal.

6. Apparatus according to claim 5 wherein the last mentioned means comprise means to which issue a constant voltage at each interruption of the first interrupted voltage signal and means which produce zero voltage caused at each interruption of the second interrupted voltage signal.

7. Apparatus for communicating digital data by sinusoidal waveforms comprising:

a source of digital data wherein the digital data is represented by sinusoidal waveforms, each half cycle substantially representing a digital bit;

means to which the sinusoidal waveform is communicated, said means creating positive and negative voltage spikes each time the sinusoidal waveform goes positive and negative, respectively;

means at first and second comparator sites to which said voltage spikes are communicated;

means at each comparator site comparing the voltage of said spikes to a predetermined voltage level, the comparison at the two sites being of opposite polarity, respectively;

means at each comparator site normally issuing a constant known voltage signal and means interrupting said constant voltage signal when the voltage spike exceeds the predetermined voltage level, either in the positive or in the negative depending on the site; and

means which receive the two interrupted voltage signals and integrate the two interrupted voltage signals into a single output digital signal.

8. Apparatus according to claim 7 wherein the last mentioned means comprise means which issue a constant voltage at each interruption of the first interrupted voltage signal and means which produce zero voltage caused by each interruption of the second interrupted voltage signal.

9. Apparatus according to claim 7 wherein the last mentioned means comprise means producing an output digital signal which has a data transmission rate substantially equal to twice the frequency of the base band signal.

10. Apparatus according to claim 9 wherein the demodulating means comprise means which produce a base band signal having a frequency of on the order of 4800 Hz and wherein the producing means comprise means which generate an output data transmission rate of on the order of 9600 BAUD.

11. A method for communicating digital data by radio frequency comprising:

issuing digital data at a first location;

superimposing the issued digital data upon a carrier waveform to create a composite sinusoidal waveform containing said digital data;

transmitting said composite sinusoidal waveform at a predetermined site;

receiving said composite sinusoidal waveform at a site remote from the predetermined site;

demodulating a base band signal from the received composite waveform;

creating positive and negative voltage spikes each time the demodulated base band signal goes positive and negative, respectively;

communicating said positive and negative voltage spikes to first and second comparator sites;

comparing the voltage of said spikes to a predetermined voltage level at each comparator site, the comparison at the two sites being of opposite polarity, respectively;

issuing a constant known voltage signal at each comparator site;

interrupting said constant voltage signal when the voltage spike exceeds the predetermined voltage level, either in the positive or in the negative, depending on the site;

integrating the two interrupted voltage signals into a single output digital data signal corresponding to the digital data initially issued; and

utilizing said output digital data signal.

12. A method according to claim 11 wherein integrating step further comprises initiating a constant voltage at each interruption of the voltage signal at one comparator site and producing zero voltage at each interruption of the voltage signal at the other comparator site.

13. A method according to claim 11 wherein the integrating step further comprises producing data having a data transmission rate substantially equal to twice the frequency of the base band signal.

14. A method according to claim 13 wherein said demodulating step further comprises producing a base band signal having a frequency of on the order of 4800 Hz and wherein said producing data step comprises outputting digital data having a data transmission rate of on the order of 9600 BAUD.

15. A method for producing a square waveform corresponding to a sinusoidal waveform comprising:

producing a sinusoidal waveform;

creating positive and negative voltage spikes each time the sinusoidal waveform goes positive and negative, respectively;

communicating said positive and negative voltage spikes to first and second comparator sites;

comparing the voltage of said spikes to a predetermined voltage level at each comparator site, the comparison at the two sites being of opposite polarity, respectively;

issuing a constant known voltage signal at each comparator site;

interrupting said constant voltage signal when the voltage spike exceeds the predetermined voltage level, either in the positive or in the negative, depending on the site; and

integrating the two interrupted voltage signals into a single output square waveform corresponding to the initially produced sinusoidal waveform.

16. A method according to claim 15 wherein the integrating step further comprises initiating a constant voltage at each interruption of the voltage signal at one comparator site and producing a zero voltage at each interruption to the voltage signal at the other comparator site.

17. A method for communicating digital data by sinusoidal waveform comprising:

generating digital data wherein the digital data is represented by a sinusoidal waveform, each half cycle substantially representing a single digital bit;

creating positive and negative voltage spikes each time the sinusoidal waveform goes positive and negative, respectively;

communicating said voltage spikes to first and second comparator sites;

comparing the voltage of said spikes to a predetermined voltage level at each comparator site, the comparison at the two sites being of opposite polarity, respectively;

issuing a constant known voltage signal at each comparator site;

interrupting said constant voltage signal when the voltage spike exceeds the predetermined voltage level, either in the positive or in the negative depending on the site; and

integrating the two interrupted voltage signals into a single output digital signal corresponding to the initially generated digital data.

18. A method according to claim 17 wherein the integrating step further comprises initiating a constant voltage at each interruption of the first interrupted voltage signal and producing zero voltage at each interruption of the second interrupted voltage signal.

19. A method according to claim 17 wherein the integrating step further comprises producing data having a data transmission rate substantially equal to twice the frequency of the base band signal.

20. A method according to claim 19 wherein said demodulating step further comprises producing a base band signal having a frequency of on the order of 4800 Hz and wherein said producing data step comprises outputting digital data having a data transmission rate of on the order of 9600 BAUD.