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Controlled refrigeration system

  • US 4,614,089 A
  • Filed: 03/19/1985
  • Issued: 09/30/1986
  • Est. Priority Date: 03/19/1985
  • Status: Expired due to Fees
First Claim
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1. A controlled refrigeration system comprising at least one compressor controller, transducer means for developing a signal representing refrigerant pressure, means responsive to the signal representing refrigerant pressure for developing a first digital, cut-in signal, means responsive to the signal representing refrigerant pressure for developing a second digital, cut-out signal, means responsive to application of power to said controller for developing a third digital signal indicative of expiration of a predetermined power-up delay period, means responsive to a signal representing deenergization of a refrigerant compressor for developing a fourth digital signal indicative of expiration of a predetermined down-time delay, and circuit means for developing a compressor-energizing control output in response to contemporaneous presence of the third digital signal, the fourth digital signal and the first digital signal, and for developing a compressor-deenergizing control output in response to contemporaneous presence of the third digital, the fourth digital signal and the second digital signal, wherein said circiut means for developing the compressor-energizing and compressor-deenergizing control outputs comprises logic circuit means, wherein said logic circuit means comprises a first AND gate having an output terminal, its two input terminals being coupled respectively to receive the third digital signal and the fourth digital signal and a second AND gate having an output terminal, its first input terminal being coupled to receive a digital signal from said output terminal of said first AND gate, including a source of clock pulses;

  • and OR gate means coupled to receive the first digital, cut-in signal and the second digital, cut-out signal for producing a digital data output signal upon the occurrence of either the digital, cut-in signal or the digital, cut-out signal;

    a counter having an output terminal, a clock input terminal coupled to receive the clock pulses and an enabling input terminal coupled to receive the digital data output signal from said OR gate means;

    a further AND gate having an output terminal, one of its input terminals being coupled to receive the first digital, cut-in control signal and its second input terminal being coupled to said output terminal of said counter to receive a digital output signal therefrom which appears upon expiration of a predetermined count; and

    an additional AND gate having an output terminal, one of its input terminals being coupled to receive the second digital, cut-out control signal and its second input terminal being coupled to said output terminal of said counter to receive the digital output signal therefrom which appears upon expiration of a predetermined count.

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