Method for fabricating modules comprising uniformly stacked, aligned circuit-carrying layers
First Claim
1. In the manufacturing of an electronic-circuitry-supporting stack of layers, each of which extends in a plane perpendicular to an access plane end at one end of the stack, and each of which provides a multiplicity of spaced electrical leads at the access plane, such leads being part of a two-dimensional planar array having its X-axis parallel to the layer planes and its Y-axis perpendicular to the layer planes, the method comprising:
- forming a plurality of substrate layers each having circuitry thereon providing at the access plane end a multiplicity of separate electrical leads spaced along the X-axis of the array;
measuring the thickness of each layer;
determining an order, based at least partially on the layer thickness measurements, in which to stack the layers so as to place the access plane electrical leads at their desired locations in the Y-axis of the array;
fabricating a stack-confining structure which includes (a) lower and upper wall members having surfaces which will engage the lower and upper layers of the stack to determine the Y-axis dimension, and (b) a plurality of position reference elements perpendicular to said wall members adapted to determine the X-axis alignment of at least two sides of each of the layers;
wet stacking the layers in the predetermined order after applying substantially the same amount of a liquid adhesive material between each pair of adjacent layers;
placing the layers in the stack-confining structure supported on the lower wall member;
aligning the layers along the X-axis by engaging them against the position reference elements of the stack-confining structure;
using the upper and lower wall members of the stack-confining structure to exert pressure along the Y-axis causing the Y-axis dimension of the stack to correspond to the desired final dimension; and
subjecting the confined stack to heat in order to cause the liquid adhesive to secure the layers in an integrated stack.
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Accused Products
Abstract
A method and related fixtures are disclosed which permit formation of stacks of thin circuitry-carrying layers. The layers terminate in an access plane having a two dimensional array of closely-spaced electrical leads. The method includes the steps of measuring the thickness of separate chips, selecting groups of chips having appropriate thicknesses, applying appropriate amounts of epoxy between adjacent chips, aligning the chips (and their electrical leads) in the direction parallel to their planes (i.e., the X-axis), and closing the cavity with an end wall which (a) exerts pressure on the stacked chips and epoxy in a direction perpendicular to the chip planes, and (b) establishes a fixed height of the stack in order to align the leads in the Y-axis. The final fixture provides a fixed-size cavity for confining the layers during curing of thermo-setting adhesive which has been applied between each adjacent pair of layers. An initial fixture is provided for accurately measuring the thickness of each layer under substantial layer-flattening pressure. An intermediate fixture is provided for wet stacking the layers prior to their insertion into the final fixture.
135 Citations
14 Claims
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1. In the manufacturing of an electronic-circuitry-supporting stack of layers, each of which extends in a plane perpendicular to an access plane end at one end of the stack, and each of which provides a multiplicity of spaced electrical leads at the access plane, such leads being part of a two-dimensional planar array having its X-axis parallel to the layer planes and its Y-axis perpendicular to the layer planes, the method comprising:
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forming a plurality of substrate layers each having circuitry thereon providing at the access plane end a multiplicity of separate electrical leads spaced along the X-axis of the array; measuring the thickness of each layer; determining an order, based at least partially on the layer thickness measurements, in which to stack the layers so as to place the access plane electrical leads at their desired locations in the Y-axis of the array; fabricating a stack-confining structure which includes (a) lower and upper wall members having surfaces which will engage the lower and upper layers of the stack to determine the Y-axis dimension, and (b) a plurality of position reference elements perpendicular to said wall members adapted to determine the X-axis alignment of at least two sides of each of the layers; wet stacking the layers in the predetermined order after applying substantially the same amount of a liquid adhesive material between each pair of adjacent layers; placing the layers in the stack-confining structure supported on the lower wall member; aligning the layers along the X-axis by engaging them against the position reference elements of the stack-confining structure; using the upper and lower wall members of the stack-confining structure to exert pressure along the Y-axis causing the Y-axis dimension of the stack to correspond to the desired final dimension; and subjecting the confined stack to heat in order to cause the liquid adhesive to secure the layers in an integrated stack. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification