Method of forming a dielectric layer on a semiconductor device

• US 4,619,839 A
• Filed: 12/12/1984
• Issued: 10/28/1986
• Est. Priority Date: 12/12/1984
• Status: Expired due to Term

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: Fairchild Camera and Instrument Corporation
• Inventors: Lehrer, William I.
• Primary Examiner(s): Smith, John D.
• Application Number:
  US06/680,878
• Time in Patent Office: 685 Days
• Field of Search: 427/82, 427/93, 427/240, 427/89
• US Class Current: 438/782
• CPC Class Codes: H01L 21/02123 the material containing silicon
• CPC Class Codes: H01L 21/02282 liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
• CPC Class Codes: H01L 21/316 composed of oxides or glassy oxides or oxide based glass
• CPC Class Codes: H01L 21/76819 Smoothing of the dielectric planarisation of insulating materials per se H01L21/31051

Abstract

A method for forming a substantially planar inorganic dielectric layer over a predetermined pattern of electrical interconnects comprises the steps of reacting phosphoric acid and a trivalent metallic halide compound with an aliphatic solvent to form a coating fluid. The coating fluid is then spun onto the semiconductor device to form a layer over the electrical interconnect. The resultant device is then baked at a first temperature to drive off the solvent and then baked at a second, higher temperature, in order to promote the glass forming reaction. This process is repeated as required to form a coating layer having a thickness which exhibits levelling characteristics of such high quality that fine topography can be carried out on succeeding layers of metal in order to form additional interconnect layers with precision.

Claims

1. A method of forming a substantially planar layer of an electrically insulating material over electrical interconnect topography on a semiconductor device, said method comprising the steps of:

(a) reacting phosphoric acid and a trivalent metallic halide compound with an aliphatic solvent to form a coating fluid;

(b) spinning said coating fluid onto a surface of said semiconductor device to form a layer over said interconnect topography; and

(c) heating at least said layer to at least a first predetermined temperature for at least a first predetermined period of time.

2. The method in accordance with claim 1 wherein said trivalent metallic halide compound is selected from the group consisting essentially of aluminum chloride, ferric chloride and chromic chloride.

3. The method in accordance with claim 2 wherein said aliphatic solvent is selected from the group consisting essentially of methanol, ethanol, propanol and butanol.

4. The method in accordance with claim 3 wherein said trivalent metallic halide compound comprises aluminum chloride.

5. The method in accordance with claim 4 wherein said aluminum chloride and said phosphoric acid are mixed in molar proportion.

6. The method in accordance with claim 5 wherein said aliphatic solvent comprises methanol.

7. The method in accordance with claim 6 wherein said methanol and said molar proportion of aluminum chloride and phosphoric acid are combined in 1:

1 proportion.

8. The method in accordance with claim 6 wherein said methanol and said molar proportion of aluminum chloride and phosphoric acid are combined in 1:

2 proportion.

9. The method in accordance with claim 3 additionally comprising the step of adding a predetermined amount of cyclopentanone.

10. The method in accordance with claim 3 additionally comprising the step of adding a predetermined amount of an agent, selected from the group consisting essentially of TEOS and boric oxide, to said coating fluid.

11. The method in accordance with claim 10 wherein said predetermined amount of said agent is less than ten molar percent.

12. The method in accordance with claim 3 wherein step (c) comprises the steps of:

(1) heating said layer at a first temperature for a first period of time;

then

(2) heating said layer at a second temperature for a second period of time.

13. The method in accordance with claim 12 wherein step (c) comprises the steps of:

(1) heating said layer at a temperature substantially equal to 90°

C. for approximately 30 minutes;

then

(2) heating said layer at a temperature substantially equal to 135°

C. for approximately 90 minutes.

14. The method in accordance with claim 12 additionally comprising the step of:

(d) repeating steps (b) and (c) as required to form a first layer having a predetermined thickness.

15. The method in accordance with claim 14 wherein the predetermined thickness of said first layer is in a range of from substantially one micron to two microns inclusive.

16. The method in accordance with claim 14 additionally comprising the steps of:

(e) forming a first set of vias through said first layer for making electrical contact with said under lying interconnect topography at predetermined locations thereon;

(f) forming a second predetermined pattern of electrical interconnects on said first layer, said pattern of electrical interconnects making electrical contact with said interconnect topography through said vias;

(g) spinning said coating fluid over said predetermined interconnect pattern to form a layer thereover;

(h) heating at least said layer to at least a first predetermined temperature for at least a first predetermined period of time; and

(i) repeating steps (g) and (h) as required to form a second layer having a predetermined thickness.

17. The method in accordance with claim 16 wherein the predetermined thickness of said second layer is substantially equal to the predetermined thickness of said first layer.

18. The method in accordance with claim 17 wherein steps (e) through (i) are repeated at least once to form at least a third electrical interconnect pattern having a substantially planarized coating of predetermined thickness formed thereover.