Multiprocessor computing system featuring shared global control
First Claim
1. In a data processing communication or telephone system, a multiprocessor comprising:
- a plurality of stations, each having a first plurality and a second plurality of addresses associated therewith, the addresses of the first plurality of addresses of each station being exclusive to that station and the addresses of the second plurality of addresses being common to the stations;
each station including a plurality of addressable elements, each element having a first address from the first plurality of addresses and a second address from the second plurality of addresses associated therewith;
the plurality of elements of each station including a plurality of common elements each having a functional counterpart common element in at least one other station, each common element and it counterpart common elements having the same second address associated with them;
a system communication medium interconnecting the plurality of stations;
each station including a station communication medium interconnecting the plurality of elements of the associated station;
at least two of the plurality of stations each including element accessing means for selectively generating the first address of an element of another station on the system medium to access the element of the other station, and for selectively generating the second address of an element of the associated station on the station medium of the associated station to access the element of the associated station; and
each station including first interface means for connecting the system medium with the station medium of the associated station in response to detecting an address from the first plurality of addresses of the associated station on the system medium.
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Accused Products
Abstract
A multiprocessor system comprises a plurality of stations interconnected by a system communication bus and cooperating in the performance of system tasks. Each station includes a plurality of addressable elements interconnected by a station communication bus. All stations are mapped into a common address space, with the elements of each station mapped onto like relative addresses in two subspaces of the address space; a subspace which is shared in common by all stations, and a subspace dedicated to the station whose addresses are the common subspace addresses in combination with a station-identifying address portion. The stations are symmetrical: like elements in all of the stations are mapped onto like relative addresses in their associated subspaces. Addressing within the system is self-referential: a station accesses one of its addressable elements by placing its common subspace address on the station communication bus. Each station'"'"'s station bus is selectively interfaced to the system bus, and a station accesses an addressable element of another station by placing its dedicated subspace address on the station bus, interfacing its station bus with the system bus, and causing the other station to interface its station bus with the system bus. A station accesses an element of another station passively, without utilizing the intelligence, if any, of the other station to make the access.
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Citations
23 Claims
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1. In a data processing communication or telephone system, a multiprocessor comprising:
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a plurality of stations, each having a first plurality and a second plurality of addresses associated therewith, the addresses of the first plurality of addresses of each station being exclusive to that station and the addresses of the second plurality of addresses being common to the stations; each station including a plurality of addressable elements, each element having a first address from the first plurality of addresses and a second address from the second plurality of addresses associated therewith; the plurality of elements of each station including a plurality of common elements each having a functional counterpart common element in at least one other station, each common element and it counterpart common elements having the same second address associated with them; a system communication medium interconnecting the plurality of stations; each station including a station communication medium interconnecting the plurality of elements of the associated station; at least two of the plurality of stations each including element accessing means for selectively generating the first address of an element of another station on the system medium to access the element of the other station, and for selectively generating the second address of an element of the associated station on the station medium of the associated station to access the element of the associated station; and each station including first interface means for connecting the system medium with the station medium of the associated station in response to detecting an address from the first plurality of addresses of the associated station on the system medium. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification