Apparatus for providing a carrier signal with two digital data streams I-Q modulated thereon

• US 4,626,803 A
• Filed: 12/30/1985
• Issued: 12/02/1986
• Est. Priority Date: 12/30/1985
• Status: Expired due to Term

• Current Assignee: Ericsson, Inc. (Telefonaktiebolaget LM Ericsson)
• Original Assignee: General Electric Company
• Inventors: Holm, John R.
• Primary Examiner(s): Grimm, Siegfried H.
• Application Number:
  US06/814,359
• Time in Patent Office: 337 Days
• Field of Search: 332/9 R, 332/16 R, 332/21, 332/23 R, 375/44, 375/52, 375/67
• US Class Current: 332/151
• CPC Class Codes: H04L 27/365 Modulation using digital generation of the modulated carrier (not including modulation of a digitally generated carrier)

Abstract

A digital I-Q modulator provides an analog signal at a desired frequency ω₁ with in-phase I and quadrature-phase Q modulation sidebands provided responsive to different associated ones of in-phase I and quadrature-phase Q digital data streams, each having the same number N of data bits. A multiplexer alternatingly selects a different one of the data streams to provide a first N-bit-wide data signal during each of a successive multiplicity of time intervals of duration T essentially equal to the reciprocal of the carrier signal frequency ω₁. The bits of the data signal are inverted to provide another data signal during every other one of a multiplicity of inversion time intervals of duration T/2, with each commencing at one of the beginning and midpoint of each time interval T. A single digital-to-analog converter (DAC) uses the sequentially inverted data stream to provide an analog signal having an amplitude substantially established by the digital value of the second data signal during each of another multiplicity of conversion time intervals of duration T/4, each commencing at one of the beginning and midpoint of each inversion time interval T/2. A bandpass filter, having a center frequency substantially equal to the carrier signal frequency F and a bandpass of at least twice the baseband signal bandwidth of the digital data streams effectively removes all frequency components except those of the desired modulation envelopes at the desired carrier frequency.

Claims

1. A digital I-Q modulator for providing an analog signal at a desired carrier signal frequency ω

₁ and having in-phase I and quadrature-phase Q modulation sidebands thereof respectively provided responsive to respective different ones of in-phase I and quadrature-phase Q baseband digital data stream signals, comprising;

means for alternatingly selecting a different one of the pair of data stream signals to provide a first data signal during each of a successive multiplicity of time intervals of duration T essentially equal to the reciprocal of the carrier signal frequency ω

₁ ;

means for inverting each bit of the first data signal during every other one of a multiplicity of successive inversion time intervals of duration T/2, each commencing at successive ones of the beginning and midpoint of each time interval T, to provide a second data signal;

a single digital-to-analog converter (DAC) means for converting said second data signal to an analog signal portion having an amplitude substantially established by the digital value of the second data signal during each of another multiplicity of successive conversion time intervals of duration T/4, each commencing at successive ones of the beginning and midpoint of each inversion time interval T/2; and

a bandpass filter having a center frequency substantially equal to the carrier signal frequency ω

₁ and a passband of at least twice the bandwidth of the baseband digital data stream signals.

2. The modulator of claim 1, wherein each of the pair of data digital data stream signals is N bits wide.

3. The modulator of claim 2, wherein each of the first and second data signals are N-bit-wide signals.

4. The modulator of claim 3, wherein said DAC means performs each converting process responsive to a pre-selected portion of a first timing signal.

5. The apparatus of claim 4, wherein said selecting means comprises a N-bit-wide multiplexer for selecting one of the two data stream signals as the first data signal, responsive to a second timing signal being at an associated one of respective first and second levels.

6. The modulator of claim 5, further comprising means, receiving the first timing signals, for providing the second timing signal as a substantially square-waveform signal.

7. The modulator of claim 6, wherein said inverting means comprises N means each for providing a like bit of the second data signal respectively at first and second logic levels if an associated and different one of the N bits of the first data signal and a third timing signal having respective first and second states are respectively in the same and different logic states.

8. The modulator of claim 7, further comprising means, receiving the second timing signal, for providing the third timing signal as a substantially square-waveform signal.

9. The modulator of claim 8, wherein said third timing signal providing means comprises a divide-by-two circuit having an output and an input receiving the second timing signal, for providing the third timing signal at its output with a frequency essentially equal to one-half the frequency of the second timing signal.

10. The modulator of claim 9, wherein said second timing signal providing means comprises a divide-by-two circuit having an output and an input receiving the first timing signal, for providing the second timing signal at its output with a frequency essentially equal to one-half the frequency of the first timing signal.

11. The modulator of claim 10, wherein said first timing signal is a substantially square-waveform signal.

12. The modulator of claim 7, wherein each of said N means comprises a two-input exclusive-OR gate having a first input receiving said third timing signal, with each gate having a second input receiving one associated and different one of the N bits of each first data signal from said selecting means.

13. The modulator of claim 6, wherein said second timing signal providing means comprises a divide-by-two circuit having an output and an input receiving the first timing signal, for providing the second timing signal at its output with a frequency essentially equal to one-half the frequency of the first timing signal.

14. The modulator of claim 13, wherein said first timing signal is a substantially square-waveform signal.

15. A method for providing an analog signal at a desired carrier signal frequency ω

₁, having in-phase I and quadrature-phase Q modulation sidebands thereof respectively provided responsive to respective different ones of in-phase I and quadrature-phase Q baseband digital data stream signals, comprising the steps of;

sampling the I data stream signal at the beginning of each of a multiplicity of successive sampling time intervals of duration T, essentially equal to the reciprocal of the carrier signal frequency ω

₁, to provide a first sample signal;

sampling the Q data stream signal at a time delayed by one-quarter of the time interval T after the beginning of each of the multiplicity of successive time intervals at which the I data stream signal is sampled, to provide a second sample signal;

combining the first and second sample signals, in the time domain, to provide a combined signal; and

filtering the combined signal to include spectral energy substantially limited to a frequency band having a center frequency substantially equal to the carrier signal frequency ω

₁ and a passband of at least twice the bandwidth of the baseband digital data stream signals.

16. The method of claim 15, further including the steps of:

sampling the I data stream signal also at each of a like multiplicity of successive sampling times each delayed by one-half the time interval T from the beginning of an associated I signal sampling time interval;

sampling the Q data stream signal beginning also at each of a like multiplicity of successive sampling times each delayed by three-quarters the time interval T from the beginning of said associated sampling time interval;

inverting the data bits of the resulting I and Q sample signals, taken at the one-half and three-quarter times of each of the sample time intervals T, to provide an inverted sample signal; and

combining the inverted sample signal, in the time domain, with the combined first and second sample signals, prior to filtering.