Remote data controller for a communication system

• US 4,628,478 A
• Filed: 07/07/1983
• Issued: 12/09/1986
• Est. Priority Date: 07/07/1983
• Status: Expired due to Term

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Henderson, James A. Jr.
• Primary Examiner(s): Thomas, James D.
• Assistant Examiner(s): Lee, Thomas C.
• Application Number:
  US06/511,611
• Time in Patent Office: 1,251 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 364/188, 364/189, 364/132, 364/137, 364/138, 364/144, 340/825.52, 340/825.54, 340/825.72, 340/825.07, 340/825.06, 340/825.17
• US Class Current: 710/305
• CPC Class Codes: G06F 13/38 Information transfer, e.g. on bus G06F13/14 takes precedence
• CPC Class Codes: H04W 24/00 Supervisory, monitoring or testing arrangements

Abstract

The communications system may include wireless two-way communications equipment having selectable functions and various operational features. Control modules each include mechanisms for providing indicia representative of the status of the features of the communications equipment and mechanisms for generating data for controlling the functions to be selected on the communications equipment. A group of the control modules are coupled to a panel module which selectively communicates with each of the control modules in the group. An interface circuit is coupled to a plurality of the panel modules for selectively communicating with each; the interface circuit includes a microprocessor for writing indicia data to each of the selected control modules via the selected panel module and reads the control data generated by the control modules. The periodic scanning and reading of information is utilized to ascertain changes in the data.

Claims

1. In a communications system including communications equipment having operator selectable functions and providing status signals representative of the operation condition of features of the communication equipment and means for controlling the communications equipment, the improvement in said controlling means comprising:

control modules each including means for receiving indicia data representative of the operational condition of the features of the communications equipment and providing indicia representative thereof, and means for generating data for controlling the functions selected on the communications equipment;

at least two control panel means each coupled to a predetermined plurality of said control modules for communicating digitally with each of said plurality, each of said control panel means including a panel selector having a predetermined address, and a module selector having a predetermined address for selecting one of the control modules associated with a control panel means;

data interface circuit means coupled between the communications equipment and each of said control panel means for communicating digitally with each of the control panel means, said data interface circuit means including a microprocessor means for selecting one of said panel means and one of its associated control modules via addressing the corresponding panel selector and module selector, writing indicia data representative of said status signal to the selected control module via the selected control panel means, and for reading said control data generated by said generating means as coupled by said control panel means; and

means for selectively inverting the most significant bit in a binary number utilized to address said predetermined address of the panel selector after the generation of said binary number thereby defining a first range of addresses corresponding to the most significant bit not being inverted and a second range of addresses when the most significant bit is inverted.

2. The system according to claim 1 further comprising shift register means disposed in said control modules for receiving said indicia data in serial form from said microprocessor means.

3. The system according to claim 1 wherein said interface circuit means includes a shift register means for receiving said control data in serial form from said generating means and permitting said microprocessor means to read said control data from said shift register means in parallel form.

4. The system according to claim 1 wherein said interface circuit means can communicate with a maximum integer number M of control panel means and said control panel means can communicate with a maximum integer number N of control modules, said microprocessor means further comprising a means for scanning each of said M control panel means and each of the N control modules associated therewith, said scanning means causing said microprocessor means to write said indicia data and read said control data for each of the possible N control modules for each of the possible M control panel means even if fewer than the maximum number of control panel means and control modules are utilized, whereby additional control modules and control panel means can be added up to the maximum permissible number of each without altering the operational control of said microprocessor means.

5. The system according to claim 1 wherein said microprocessor means includes scanning means for periodically writing indicia data to and reading control data from each control module, means for storing said control data read from each of said control modules, means for comparing second and third control data values for a given control module with that of a first previously read control data value for the same control module, said microprocessor means effectuating a change in function in said communication equipment in response to said comparison means finding the difference between the second and first value to be the same as the difference between the third and first value, whereby a validation and debouncing function is accomplished by said microprocessor means.

6. The system according to claim 1 wherein said panel selector and said module selector share common address lines thereby minimizing the number of address lines required to address each control module and control panel means.

7. In a communications system including communications equipment having operator selectable functions and providing status signals representative of the operation condition of features of the communication equipment and means for controlling the communications equipment, the improvement in said controlling means comprising:

control modules each including means for receiving indicia data representative of the operational condition of the features of the communications equipment and providing indicia representative thereof, and means for generating data for controlling the functions selected on the communications equipment;

at least two control panel means each coupled to a predetermined plurality of said control modules for communicating digitally with each of said plurality, each of said control panel means including a panel selector having a predetermined address, and a module selector having a predetermined address for selecting one of the control modules associated with a control panel means;

data interface circuit means coupled between the communications equipment and each of said control panel means for communicating digitally with each of the control panel means, said data interface circuit means including a microprocessor means for selecting one of said panel means and one of its associated control modules via addressing the corresponding panel selector and module selector, writing indicia data representative of said status signal to the selected control module via the selected control panel means and for reading said control data generated by said generating means as coupled by said control panel means; and

flip-flop means responsive to said panel selector being addressed for selectively inverting the most significant bit of the binary number used to address the module selector thereby defining a first range of addresses corresponding to the most significant bit not being inverted and a second range of addresses when the most significant bit is inverted.

8. The system according to claim 7 wherein said panel selector and said module selector share common address lines thereby minimizing the number of address lines required to address each control module and control panel means.

9. In a communications system including communications equipment having operator selectable functions and providing status signals representative of the operation condition of features of the communication equipment and means for controlling the communications equipment, the improvement in said controlling means comprising:

control modules each including means for receiving indicia data representative of the operational condition of the features of the communications equipment and providing indicia representative thereof, and means for generating data for controlling the functions selected on the communications equipment;

at least two control panel means each coupled to a predetermined plurality of said control modules for communicating digitally with each of said plurality, each of said control panel means including a panel selector having a predetermined address, and a module selector having a predetermined address for selecting one of the control modules associated with a control panel means;

data interface circuit means coupled between the communications equipment and each of said control panel means for communicating digitally with each of the control panel means, said data interface circuit means including a microprocessor means for selecting one of said panel means and one of its associated control modules via addressing the corresponding panel selector and module selector, writing indicia data representative of said status signal to the selected control module via the selected control panel means, and for reading said control data generated by said generating means as coupled by said control panel means; and

data transfer circuit means for controlling the transfer of data from said control modules to said microprocessor means and for controlling the transfer of data from said microprocessor means to said control modules, said data transfer circuit means including a single clock means for generating clock pulses which are coupled to said control panel means and control modules, said clock means providing the sole source of clock pulses for the control panel means and control modules.