Apparatus for receiving low level digital signals transmitted over power lines

• US 4,633,218 A
• Filed: 12/19/1983
• Issued: 12/30/1986
• Est. Priority Date: 12/19/1983
• Status: Expired due to Term

• Current Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Original Assignee: Honeywell Incorporated (Honeywell International Inc.)
• Inventors: Hendrickson, Max, Cohen, Harry A., Palsgrove, Boyd H.
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): Rokoff, Kenneth I.
• Application Number:
  US06/562,646
• Time in Patent Office: 1,107 Days
• Field of Search: 375/88, 340/310 A, 340/310 R, 340/825.71, 340/825.73, 340/825.76
• US Class Current: 375/334
• CPC Class Codes: H04B 2203/5416 by adding signals to the wave form of the power source
• CPC Class Codes: H04B 2203/5425 improving S/N by matching impedance, noise reduction, gain control
• CPC Class Codes: H04B 2203/5441 Wireless systems or telephone
• CPC Class Codes: H04B 2203/5458 Monitor sensor; Alarm systems
• CPC Class Codes: H04B 2203/5483 using coupling circuits
• CPC Class Codes: H04B 2203/5491 using filtering and bypassing
• CPC Class Codes: H04B 3/542 the information being in digital form

Abstract

Digital data is transmitted over AC power lines at typically a 300 baud rate and at a frequency of 130 kilohertz representing a binary ONE and 131 kilohertz representing a binary ZERO. Apparatus in the receiver relay including a quadrature detector converts the high frequency signals to digital binary signals which are applied to a microprocessor. The microprocessor generates signals to control relays in accordance with the information received from the AC power lines.

Claims

1. A power line carrier system includes a central controller and a plurality of receiver relays, all coupled in common to an alternating current (AC) power line, said central controller transmitting information over said AC power line in the form of high frequency signals, each of said plurality of receiver relays having apparatus for receiving and converting said high frequency signals to digital signals, said apparatus comprising:

first means coupled to said AC power line for receiving said high frequency signals, said first means comprising capacitor means and inductor means tuned to a midpoint between first and said second frequencies of said high frequency signals for tapping off said first frequency signal and said second frequency signal from said AC power line;

second means coupled to said first means for increasing the amplitude of said high frequency signals, said second means comprising transformer means for increasing the voltage amplitude of said first frequency signal and said second frequency signal;

third means coupled to said second means for clipping off the top and bottom of said high frequency signals;

quadrature detector means coupled to said third means for receiving the first frequency signal of said high frequency signals representative of a binary ONE and receiving the second frequency signal of said high frequency signals representative of a binary ZERO and generating a corresponding binary ONE signal and a binary ZERO signal;

fourth means coupled to said quadrature detector means for generating a voltage signal in a first state representative of said binary ONE signal and generating said voltage signal in a second state representative of said binary ZERO signal; and

fifth means coupled to said fourth means and responsive to a sequence of said voltage signals in said first and said second states representative of said information for performing a function of specified by said information.

2. The apparatus of claim 1 wherein said quadrature detector means comprises:

first quadrature means for generating said first frequency signal having a first phase and said second frequency signal having a second phase; and

second quadrature means being responsive to said first frequency signal having said first phase for generating said binary ONE signal, and being responsive to said second frequency signal having said second phase for generating said binary ZERO signal.

3. The apparatus of claim 2 wherein said fourth means comprises:

lowpass filter means for filtering said binary ONE signal and said binary ZERO signal;

diode limiting means for receiving said filtered binary ONE signal and said filtered binary ZERO signal and generating a clipped binary ONE reference signal and a clipped binary ZERO reference signal; and

comparator means responsive to said filtered binary ONE signal and said clipped binary ONE reference signal for generating said voltage signal in said first state, said comparator means being responsive to said filtered binary ZERO signal and said clipped binary ZERO reference signal for generating said voltage signal in said second state.

4. The apparatus of claim 3 wherein said voltage signal in said first state is plus five volts representative of a binary ONE information bit and said voltage signal in said second state is zero volts representative of a binary ZERO information bit.

5. The apparatus of claim 4 wherein said fifth means is a microprocessor.

6. A power line carrier system comprises:

an alternating current (AC) power line;

central controller means coupled to said AC power line for transmitting information in the form of high frequency carrier signals over said AC power line;

receiving means coupled to said AC power line for receiving said high frequency carrier signals and generating binary data signals;

said receiving means including quadrature circuit means for generating a first frequency signal having a first phase in response to a first frequency of said high frequency carrier signals representative of a binary ONE data bit, said quadrature circuit means further generating a second frequency signal having a second phase in response to a second frequency of said high frequency carrier signals representative of a binary ZERO data bit;

said receiving means further having quadrature means coupled to said quadrature circuit means and responsive to said first frequency signal having said first phase for generating a voltage signal having a first voltage level representative of said binary ONE data bit, and responsive to said second frequency signal having said second phase for generating said voltage signal having a second voltage level representative of said binary ZERO data bit;

shaping means coupled to said receiving means for receiving said voltage signal and having means for comparing said voltage signal with a reference voltage, and generating a binary ONE signal when said voltage signal having said first voltage level is received by said shaping means, and generating a binary ZERO signal when said voltage signal having said second voltage level is received by said shaping means;

microprocessor means coupled to said shaping means and responsive to a sequence of said binary ONE signals and said binary ZERO signals representative of said information for generating control signals in response to said information; and

relay means responsive to said control signals for controlling apparatus.

7. The system of claim 6 wherein said first phase and said second phase are 90 degrees apart.

8. The system of claim 6 wherein said binary ONE signal is plus five volts and said binary ZERO signal is zero volts.

9. The system of claim 6 wherein said first frequency of said high frequency carrier signals is at 130 kilohertz and said second frequency of said high frequency carrier signals is at 131 kilohertz.

10. The system of claim 6 wherein said apparatus includes heating, ventilating and air conditioning equipment.