Multiple channel analog-to-digital converters

• US 4,633,226 A
• Filed: 12/17/1984
• Issued: 12/30/1986
• Est. Priority Date: 12/17/1984
• Status: Expired due to Term

• Current Assignee: Linear Design Corporation
• Original Assignee: William C. Black Jr
• Inventors: Black, William C. Jr.
• Primary Examiner(s): Miska, Vit W.
• Application Number:
  US06/682,159
• Time in Patent Office: 743 Days
• Field of Search: 340/347 AD, 340/347 SH, 307/260, 307/262, 307/269, 307/511, 328/55, 328/62, 328/105-106, 328/155
• US Class Current: 341/159
• CPC Class Codes: H03M 1/0629 Anti-aliasing

Abstract

An arrangement for reducing error in an interleaved analog-to-digital signal conversion system. The arrangement provides matching and adjustment certainty as the basis for such error reduction.

Claims

1. An analog-to-digital converter system for converting magnitudes of sequential selected points of at least one analog input signal into corresponding digital code representations, said system having a plurality of signal conversion channels each of which can provide, separately, signal representations corresponding to respective said analog input signal points, if permitted to do so, with any said signal representation chosen depending substantially on where said magnitude of said analog input signal point occurs with respect to a range of magnitudes, said system comprising:

a signal conversion channel decision means having a plurality of portions at least one of which occurs in only one of said signal conversion channels such that said portion provides said signal representation for that signal conversion channel, said signal conversion channel decision means having a signal input for receiving said analog input signal and having a plurality of reference signal inputs such that each said signal conversion channel decision means portion associated with one of said signal conversion channels can provide any said signal representation for that channel depending on whether said magnitude of said corresponding analog input signal point exceeds any, some or all magnitudes of reference signals occuring at said reference inputs if reference signals of various magnitudes are supplied to said reference inputs; and

a multiple signal provision means having a plurality of inputs and a plurality of outputs, said multiple signal provision means outputs each having available thereon a secondary reference signal of a selected magnitude if a primary reference signal is provided to at least some of said multiple signal provision means inputs where said multiple signal provision means outputs are connected to said signal conversion channel decision means reference signal inputs in such a manner that any secondary reference signal occurring on such a said multiple signal provision means output is supplied to that said signal channel conversion decision means reference signal input connected thereto.

2. The system of claim 1 wherein said multiple signal provision means comprises a plurality of effective resistors electrically connected in series with said multiple signal provision means outputs occurring at electrical connections between said effective resistors, and said multiple signal provision means inputs occurring at connections to those two of said effective resistors unconnected to others of said effective resistors.

3. The system of claim 1 wherein each signal conversion channel decision means portion comprises a plurality of amplifiers each having at least one input, and having an output, with said amplifier input being electrically connected at least intermittently to a selected one of said signal conversion channel decision means input and said signal conversion channel decision means reference inputs.

4. The system of claim 1 wherein said signal conversion channel decision means has both a common portion and a plurality of channel portions each associated, as aforesaid, with a corresponding said signal conversion channel, said common portion comprising a plurality of amplifiers each having at least one input, and having an output, with said amplifier input being electrically connected at least intermittently to a selected one of said signal conversion channel decision means input and said signal conversion channel decision means reference inputs, and with each of said signal channel conversion decision means channel portions comprising a plurality of threshold switches each having an input and an output with said threshold switch input being electrically connected to a selected said amplifier output, and with each said threshold switch being such that, if electrically energized, said threshold switch output is in one state if electrical signals of a magnitude less than a first threshold value are applied to said threshold switch input and in an opposite state if such electrical signals are of a magnitude exceeding a second threshold value.

5. The system of claim 1 wherein each of said signal channel conversion decision means portions has a clocking signal input and is permitted to provide said signal representation only after receiving a selected clocking signal on said clocking signal input.

6. The system of claim 2 wherein each of said signal channel conversion decision means portions has a clocking signal input and is permitted to provide said signal representation only after receiving a selected clocking signal on said clocking signal input.

7. The system of claim 3 wherein each signal conversion channel decision means portion further comprises a plurality of threshold switches each having an input and an output with said threshold switch input being electrically connected to a selected said amplifier output, and with each said threshold switch being such that, if electrically energized, said threshold switch output is in one state if electrical signals of a magnitude less than a first threshold value are applied to said threshold switch input and in an opposite state if said electrical signals are of a magnitude exceeding a second threshold value.

8. The system of claim 4 wherein each said signal channel conversion decision means channel portion further comprises a code determination means having inputs and outputs with said code determination means inputs being electrically connected to selected said threshold switch outputs, each said code determination means being capable of providing, if electrically energized, a said digital code representation at said code determination means outputs depending on which states occur in said threshold switch outputs connected thereto.

9. The system of claim 4 wherein each amplifier has a non-inverting input and an inverting input, with one of said amplifier inputs being electrically connected to said signal conversion channel decision means signal input, and with that remaining said amplifier input of each of said amplifiers being electrically connected to a selected one of said signal conversion channel decision means reference inputs.

10. The system of claim 5 wherein there is further provided a clocking signal generator having a plurality of clocking signal generator outputs which are electrically connected to said clocking signal inputs, with said clocking signal generator means, if electrically energized, providing a said clocking signal at each clocking signal generator output which is substantially periodic but where each said clocking signal so provided is of a phase differing from that of other such said clocking signals so that each of said signal channel conversion decision means portions is substantially periodically permitted to provide said signal representations.

11. The system of claim 6 wherein there is further provided a clocking signal generator having a plurality of clocking signal generator outputs which are electrically connected to said clocking signal inputs, with said clocking signal generator means, if electrically energized, providing a clocking signal at each clocking signal generator output which is substantially periodic but where each said clocking signal so provided is of a phase differing from that of other such said clocking signals so that each of said signal channel conversion decision means portions is substantially periodically permitted to provide said signal representations.

12. The system of claim 7 wherein each said signal channel conversion decision means channel portion further comprises a code determination means having inputs and outputs with said code determination means inputs being electrically connected to selected said threshold switch outputs, each said code determination means being capable of providing, if electrically energized, a said digital code representation at said code determination means outputs depending on which states occur in said threshold switch outputs connected thereto.

13. The system of claim 7 wherein each amplifier has a non-inverting input and an inverting input, with one of said amplifier inputs being electrically connected to said signal conversion channel decision means signal input, and with that remaining said amplifier input of each of said amplifiers being electrically connected to a selected one of said signal conversion channel decision means reference inputs.

14. The system of claim 8 wherein said code determination means outputs are electrically connected to a data selector.

15. The system of claim 8 wherein each of said signal channel conversion decision means channel portions has a clocking signal input and is permitted to provide said signal representation only after receiving a selected clocking signal on said clocking signal input.

16. The system of claim 10 wherein said clocking signal generator outputs are each electrically connected through delay means to said clocking signal inputs, said delay means being capable of delaying electrical signals transmitted therethrough by a selected amount of time.

17. The system of claim 11 wherein said clocking signal generator outputs are each electrically connected through delay means to said clocking signal inputs, said delay means being capable of delaying electrical signals transmitted therethrough by a selected amount of time.

18. The system of claim 12 wherein said code determination means outputs are electrically connected to a data selector.

19. The system of claim 12 wherein each of said signal channel conversion decision means portions has a clocking signal input and is permitted to provide said signal representation only after receiving a selected clocking signal on said clocking signal input.

20. The system of claim 15 wherein there is further provided a clocking signal generator having a plurality of clocking signal generator outputs which are electrically connected to said clocking signal inputs, with said clocking signal generator, if electrically energized, providing a clocking signal at each clocking signal generator output which is substantially periodic but where each said clocking signal so provided is of a phase differing from that of other such said clocking signals so that each of said signal channel conversion decision means portions is substantially periodically permitted to provide said signal representations.

21. The system of claim 19 wherein there is further provided a clocking signal generator having a plurality of clocking signal generator outputs which are electrically connected to said clocking signal inputs, with said clocking signal generator, if electrically energized, providing a clocking signal at each clocking signal generator output which is substantially periodic but where each said clocking signal so provided is of a phase differing from that of other such said clocking signals so that each of said signal channel conversion decision means portions is substantially periodically permitted to provide said signal representations.

22. The system of claim 20 wherein said clocking signal generator outputs are each electrically connected through delay means to said clocking signal inputs, said delay means being capable of delaying electrical signals transmitted therethrough by a selected amount of time.

23. The system of claim 21 wherein said clocking signal generator outputs are each electrically connected through delay means to said clocking signal inputs, said delay means being capable of delaying electrical signals transmitted therethrough by a selected amount of time.

24. The system of claim 22 wherein said first and second threshold values are each substantially a common value.

25. The system of claim 23 wherein said first and second threshold values are each substantially a common value.

26. An analog-to-digital converter system for converting magnitudes of sequential selected points of at least one analog input signal received at a signal input into corresponding digital code representations, said system comprising:

a plurality of effective resistors electrically connected in series with resistor series outputs occurring at electrical connections between said effective resistors;

a plurality of signal conversion channels each of which can provide, separately, said digital code representations corresponding to respective said analog input signal points, if permitted to do so, and each comprising (i) a plurality of amplifiers each having at least one input, and having an output, with said amplifier input being electrically connected at least intermittently to a selected one of said signal input and said resistor series outputs, and (ii) a plurality of threshold switches each having an input and an output with said threshold switch input being electrically connected to a selected said amplifier output and with each said threshold switch being such that, if electrically energized, said threshold switch output is in one state if electrical signals of a magnitude less than a first threshold value are applied to said threshold switch input and in an opposite state if such electrical signals are of a magnitude exceeding a second threshold value, and (iii) a code determination means having inputs and outputs with said code determination means inputs being electrically connected to selected said threshold switch outputs, each said code determination means being capable of providing, if electrically energized, a said digital code representation at said code determination means outputs depending on which states occur in said threshold switch outputs connected thereto.

27. The system of claim 26 wherein each of said signal conversion channels has a clocking signal input and is permitted to provide said clocking signal representation only after receiving a selected clocking signal on said clocking signal input, and wherein said system further comprises a clocking signal generator means having a plurality of clocking signal generator outputs which are electrically connected to said clocking signal inputs, with said clocking signal generator means, if electrically energized, providing a said clocking signal at each clocking signal generator output which is substantially periodic but where such said clocking signal so provided is of a phase differing from that of other such said clocking signals so that each of said signal channel conversion decision means portions is substantially periodically permitted to provide said signal representations, said clocking signal generator outputs each being electrically connected through phase adjusting means to said clocking signal inputs with said phase adjusting means being capable of selectively adjusting times of occurrence of at least portions of signals provided to said clocking signal inputs in response to signals occurring at said clocking signal generator outputs.

28. The system of claim 26 wherein each amplifier has a non-inverting input and an inverting input, with one of said amplifier inputs being electrically connected to said signal conversion channel decision means signal input, and with that remaining said amplifier input of each of said amplifiers being electrically connected to a selected one of said signal conversion channel decision means reference inputs.

29. An analog-to-digital converter system for converting magnitudes of sequential selected points of at least one analog input signal received at a signal input into corresponding digital code representations, said system comprising:

a plurality of effective resistors electrically connected in series with resistor series outputs occurring at electrical connections between said effective resistors;

a plurality of amplifiers each having at least one input, and having an output, with said amplifier input being electrically connected at least intermittently to a selected one of said signal input and said resistor series outputs; and

a plurality of signal conversion channels each of which can provide, separately, said digital code representations corresponding to respective said analog input signal points, if permitted to do so, and each comprising (i) a plurality of threshold switches each having an input and an output with said threshold switch input being electrically connected to a selected said amplifier output and with each said threshold switch being such that, if electrically energized, said threshold switch output is in one state if electrical signals of a magnitude less than a first threshold value are applied to said threshold switch input and in an opposite state if such electrical signals are of a magnitude exceeding a second threshold value, and (ii) a code determination means having inputs and outputs with said code determination means inputs being electrically connected to selected said threshold switch outputs, each said code determination means being capable of providing, if electrically energized, a said digital code representation at said code determination means outputs depending on which states occur in said threshold switch outputs connected thereto.

30. The system of claim 29 wherein each of said signal conversion channels has a clocking signal input and is permitted to provide said clocking signal representation only after receiving a selected clocking signal on said clocking signal input, and wherein said system further comprises a clocking signal generator means having a plurality of clocking signal generator outputs which are electrically connected to said clocking signal inputs, with said clocking signal generator means, if electrically energized, providing a said clocking signal at each clocking signal generator output which is substantially periodic but where such said clocking signal so provided is of a phase differing from that of other such said clocking signals so that each of said signal channel conversion decision means portions is substantially periodically permitted to provide said signal representations, said clocking signal generator outputs each being electrically connected through phase adjusting means to said clocking signal inputs with said phase adjusting means being capable of selectively adjusting times of occurrence of at least portions of signals provided to said clocking signal inputs in response to signals occurring at said clocking signal generator outputs.

31. The system of claim 29 wherein each amplifier has a non-inverting input and an inverting input, with one of said amplifier inputs being electrically connected to said signal conversion channel decision means signal input, and with that remaining said amplifier input of each of said amplifiers being electrically connected to a selected one of said signal conversion channel decision means reference inputs.

32. An analog-to-digital converter system for converting magnitudes of sequential selected points of at least one analog input signal into corresponding digital code representations, said system having a plurality of signal conversion channels each of which can provide, separately, signal representations corresponding to respective said analog input signal points, if permitted to do so, with any said signal representation chosen depending substantially on where said magnitude of said analog input signal point occurs with respect to a range of magnitudes, said system comprising:

a signal conversion channel decision means having a plurality of portions at least one of which occurs in only one of said signal conversion channels such that said portion provides said signal representation for that signal conversion channel, said signal conversion channel decision means having a signal input for receiving said analog input signal, and each of said signal channel conversion decision means portions having a clocking signal input and is permitted to provide said signal representation only after receiving a selected clocking signal on said clocking signal input;

a clocking signal generator means having a plurality of clocking signal generator outputs which are electrically connected to said clocking signal inputs, with said clocking signal generator means, if electrically energized, providing a said clocking signal at each clocking signal generator output which is substantially periodic but where each said clocking signal so provided is of a phase differing from that of other such said clocking signals; and

a plurality of phase adjusting means each having an input electrically connected to a clocking signal generator output and each having an output electrically connected to a clocking signal input, with each said phase adjusting means being capable of selectively adjusting times of occurrence of at least portions of signals provided to said clocking signal inputs in response to signals occurring at said clocking signal generator outputs so that each of said signal channel conversion decision means portions is substantially periodically permitted to provide said signal representations.

33. The system of claim 32 wherein a said phase adjusting means is a pulse delay circuit in which various delays can be selected.

34. The system of claim 32 wherein a said phase adjusting means is formed from a plurality of inverters each having signal input and a signal output where such inverters are electrically connected in parallel such that each inverter signal input is connected to said phase adjusting means input and each inverter signal output is electrically connected to said phase adjusting means output.

35. The system of claim 34 wherein at least some of said inverters also have control signal inputs at which control signals can be provided to selectively prevent such inverters from responding to at least some portions of signals provided at said inverter signal input.

36. A signal impulse transition time adjustment circuit having a circuit input and a circuit output, said circuit comprising a plurality of inverters each having a signal input and a signal output where such inverters are electrically connected in parallel such that each inverter signal input is connected to said circuit input and each inverter signal output is electrically connected to said circuit output, and at least some of said inverters also having control signal inputs at which control signals can be provided to selectively prevent such inverters from responding to at least some portions of signals provided at said inverter signal input.

37. The apparatus of claim 36 wherein logic circuit means are provided electrically connected to said control signal inputs to provide said control signals.