Receiver for phase shift modulated carrier signals

• US 4,641,325 A
• Filed: 02/04/1985
• Issued: 02/03/1987
• Est. Priority Date: 02/04/1985
• Status: Expired due to Fees

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Hughes, William C.
• Primary Examiner(s): Griffin, Robert L.
• Assistant Examiner(s): Huseman, M.
• Application Number:
  US06/697,994
• Time in Patent Office: 729 Days
• Field of Search: 375/97, 375/112, 375/120, 375/119, 375/118, 331/1 A, 328/14, 328/155, 377/47, 377/50
• US Class Current: 375/344
• CPC Class Codes: H04L 2027/0032 at baseband and passband
• CPC Class Codes: H04L 2027/0048 Frequency multiplication
• CPC Class Codes: H04L 2027/0067 Phase error detectors
• CPC Class Codes: H04L 27/2273 associated with quadrature demodulation, e.g. Costas loop

Abstract

Method and apparatus are disclosed for providing a local oscillator signal which is in phase and frequency synchronism with a carrier signal wherein the frequency of the carrier is a constant multiple of the frequency of a reference waveform. A phase detector detects the phase of the local oscillator relative to the carrier and provides a signal to a microprocessor indicative of this phase. The microprocessor provides the local oscillator and responds to a reference waveform threshold detector to determine the number of local oscillator pulses provided during one cycle of the reference and to maintain this number to equal the constant multiple. The microprocessor further responds to the phase detector to adjust the phase of the local oscillator and thereby maintain phase synchronism with the carrier.

Claims

1. Apparatus for providing a local oscillator signal with a frequency which is at all times equal to a constant multiple of the frequency of a reference waveform, comprising:

means, responsive to said reference waveform, for providing an interrupt signal upon the occurrence of a predetermined point in each cycle of said reference; and

digital processing means for providing said local oscillator signal, said digital processing means being responsive to said interrupt signal for determining the number of pulses of said local oscillator signal provided during one cycle of said reference waveform and for modulating the frequency of said local oscillator such that the number of local oscillator pulses provided during one cycle of said reference waveform is maintained to substantially equal said constant, said digital processing means comprising a microprocessor adapted to provide said local oscillator signal, and responsive to said interrupt signal for determining the number of local oscillator pulses provided during one cycle of said reference and for modulating the number of local oscillator pulses provided to maintain this number to substantially equal said constant.

2. Apparatus, as recited in claim 1, wherein said digital processing means comprises:

means for adding a plurality of servo pulses to the pulses of a first oscillating signal to provide said local oscillator; and

a microprocessor for providing said first oscillating signal and said servo pulses, said microprocessor being responsive to said interrupt means for determining the number of pulses of said local oscillator during one cycle of said reference and for modulating the number of servo pulses provided such that the number of local oscillator pulses provided during each cycle of said reference is maintained to equal said constant multiple.

3. Apparatus, as recited in claim 2, wherein said adding means comprises a digital counter.

4. Apparatus for synchronizing a local oscillator signal to the phase and frequency of a carrier signal wherein the instantaneous frequency of said carrier is a constant first multiple of the instantaneous frequency of a reference waveform, said apparatus comprising:

means, responsive to said reference waveform, for providing an interrupt signal upon the occurrence of a predetermined point in each cycle of said waveform;

means for detecting the phase of said local oscillator relative to said carrier; and

digital processing means, responsive to said interrupt means, for providing said local oscillator signal and for maintaining the frequency of said local oscillator signal to be a constant multiple of the frequency of said reference by determining the number of local oscillator pulses provided between occurrences of said interrupt signal and maintaining this number to substantially equal said constant, said digital processing means also being responsive to said detector means to determine whether said oscillator signal leads or lags said carrier and, thereafter, to advance a lagging local oscillator and retard a leading local oscillator.

5. Apparatus, as recited in claim 4, wherein said digital processing means comprises a microprocessor for providing said local oscillator signal and for maintaining the frequency of said local oscillator to be a constant multiple of said instantaneous frequency of said reference by determining the number of local oscillator pulses provided during one cycle of said reference and modulating this number to substantially equal said constant.

6. Apparatus as recited in claim 4, wherein said digital processing means comprises:

means for adding a plurality of servo pulses to the pulses of a first oscillating signal to provide a composite signal, said adding means being further adapted to divide the frequency of said composite signal by a second multiple to provide said local oscillator signal; and

a microprocessor for providing said first oscillating signal and said servo pulses, said microprocessor being responsive to said interrupt means for determining the number of pulses of said composite signal during each cycle of said reference and for modulating the number of servo pulses provided such that the number of composite pulses provided during each cycle of said reference is maintained to equal the arithmetic sum of said first multiple and said second multiple, said microprocessor also being responsive to said detector means for determining whether said local oscillator leads or lags said carrier and for advancing a lagging local oscillator by providing one additional servo pulse and, conversely retarding a leading local oscillator by inhibiting one servo pulse.

7. Apparatus as recited in claim 6 wherein said microprocessor is further adapted to maintain independence between the frequency correction and the phase correction functions by adjusting the number of composite pulses determined to be provided during each cycle such that this number does not reflect the number of servo pulses added or inhibited to correct the phase of said local oscillator during said cycle.

8. A method for providing a local oscillator signal which is in phase and frequency synchronism with a carrier signal, wherein the frequency of said carrier signal is a first multiple of the frequency of a reference waveform, and wherein said reference waveform is known to have a lower limit frequency giving rise to a lower limit carrier frequency, said method comprising the steps of:

(a) providing a first oscillating signal of frequency equal to a second multiple of said lower limit carrier frequency;

(b) adding a number of servo pulses to said first oscillating signal to provide a composite signal;

(c) dividing the frequency of said composite signal by said second multiple to provide said local oscillator signal;

(d) periodically determining the number of said composite signal pulses during each cycle of said reference waveform;

(e) modulating the number of said servo pulses to be added to said first oscillating signal based on determination of step (d) such that the number of composite signal pulses provided during each cycle of said reference is regulated to equal the arithmetic sum of said first multiple and said second multiple;

(f) periodically determining whether said local oscillator leads said carrier signal and, if so, inhibiting one said servo pulse from being added to said first oscillating signal; and

(g) periodically determining whether said local oscillator lags said carrier signal and, if so, adding one additional said servo pulses to said first oscillating signal.

9. The method as recited in claim 8 further including the step of compensating the number of said composite signal pulses determined to be provided in any said cycle such that any said servo pulses inhibited in said cycle are included in said number and further, such that any additional servo pulses added in said cycle are not included in said number thereby maintaining independence between the frequency and phase compensation.